first commit

application/ws63/ws63_liteos_application/CMakeLists.txt

@@ -0,0 +1,40 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2022. All rights reserved.
+#===============================================================================
+set(COMPONENT_NAME "ws63_liteos_app")
+
+set(SOURCES
+)
+
+set(PUBLIC_HEADER
+    ${CMAKE_CURRENT_SOURCE_DIR}
+)
+set(LIBS
+	${CMAKE_CURRENT_SOURCE_DIR}/libws63_liteos_app.a
+)
+set(PRIVATE_HEADER
+)
+
+set(PRIVATE_DEFINES
+)
+
+set(PUBLIC_DEFINES
+)
+
+# use this when you want to add ccflags like -include xxx
+set(COMPONENT_PUBLIC_CCFLAGS
+)
+
+set(COMPONENT_CCFLAGS
+)
+
+set(WHOLE_LINK
+    true
+)
+
+set(MAIN_COMPONENT
+    true
+)
+
+build_component()

application/ws63/ws63_liteos_application/clock_init.h

@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2023. All rights reserved.
+ * Description: the header file for main.
+ *
+ */
+
+#ifndef __CLOCK_INIT_H__
+#define __CLOCK_INIT_H__
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#define CMU_XO_SIG 0X40003404
+#define XO_TRIM_ENABLE 1
+#define SIZE_8_BITS 8
+#define EFUSE_GROUP_MAX 3
+#define EXT_EFUSE_LOCK_XO_TRIM_BIT_POS 7
+#define EXT_EFUSE_XO_TRIM_1_ID  144
+#define EXT_EFUSE_XO_TRIM_2_ID  162
+#define EXT_EFUSE_XO_TRIM_3_ID  180
+#define EXT_EFUSE_RSSI_BAND3_1_ID  160
+#define EXT_EFUSE_RSSI_BAND3_2_ID  178
+#define EXT_EFUSE_RSSI_BAND3_3_ID  196
+
+typedef union {
+    /* Define the struct bits */
+    struct {
+        uint32_t rg_cmu_xo_trim_fine : 8; /* [7..0] */
+        uint32_t rg_cmu_xo_trim_coarse : 4; /* [11..8] */
+        uint32_t rg_cmu_xo_trim_rev : 4; /* [15..12] */
+        uint32_t rg_cmu_xo_trim_fine_sel : 1; /* [16] */
+        uint32_t rg_cmu_xo_trim_coarse_sel : 1; /* [17] */
+        uint32_t rg_cmu_xo_trim_rev_sel : 1; /* [18] */
+        uint32_t reserved_0 : 13; /* [31..19] */
+    } bits;
+
+    /* Define an unsigned member */
+    uint32_t u32;
+} u_cmu_xo_sig;
+
+extern void LOS_SetSysClosk(uint32_t clock);
+
+void open_rf_power(void);
+void switch_clock(void);
+void set_uart_tcxo_clock_period(void);
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif
+
+#endif // __MAIN_H__

application/ws63/ws63_liteos_application/main.h

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+/*
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2023. All rights reserved.
+ * Description: the header file for main.
+ *
+ */
+
+#ifndef __MAIN_H__
+#define __MAIN_H__
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+__attribute__((section(".text.runtime.init"))) void copy_bin_to_ram(unsigned int *start_addr,
+    const unsigned int *const load_addr, unsigned int size);
+__attribute__((section(".text.runtime.init"))) void init_mem_value(unsigned int *start_addr,
+    const unsigned int *const end_addr, unsigned int init_val);
+__attribute__((section(".text.runtime.init"))) void do_relocation(void);
+__attribute__((section(".text.runtime.init"))) void runtime_init(void);
+
+extern void LOS_PrepareMainTask(void);
+
+#ifdef WIFI_TASK_EXIST
+extern int wifi_host_task(void *param);
+extern __attribute__((weak)) int demo_init(void *param);
+#endif
+
+#ifdef CONFIG_SUPPORT_HILINK
+extern __attribute__((weak)) int hilink_entry(void *param);
+#endif
+#ifdef BGLE_TASK_EXIST
+extern void bt_thread_handle(void *para);
+#ifdef SPARKLYZER_ACTIVATED
+extern void splz_thread_handle(void *para);
+#endif
+#endif
+
+#ifdef AT_COMMAND
+void at_uart_init(void);
+#endif
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif
+
+#endif // __MAIN_H__

application/ws63/ws63_liteos_application/reset_vector.S

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+/**
+ * @file reset_vector.S
+ * @author Huawei LiteOS
+ * @brief RISC-V trap handling and startup code.
+ */
+#include "arch/cpu.h"
+
+.extern TrapVector
+.extern runtime_init
+
+.global reset_vector
+
+.local HandleReset
+
+.section  .text.entry
+.option rvc
+
+.section .text.entry
+reset_vector:
+    tail HandleReset
+
+HandleReset:
+#ifdef CHIP_EDA
+    li t0,0x0
+    csrw pmpcfg0,t0
+    li t0,0x0
+    csrw pmpcfg1,t0
+#endif
+
+    la    t0, TrapVector
+    csrw  mtvec, t0
+    csrwi mstatus, 0
+    csrwi mie, 0
+
+/* set to initial state of FPU */
+    li      t0, 0x00006000
+    csrs    mstatus, t0
+    fssr    x0
+
+    .option push
+    .option norelax
+
+/* initialize global pointer */
+    la      gp,     _gp_
+    .option pop
+
+/* initialize stack pointer: irq stack used for startup stack */
+    la sp, __stack_top__
+
+/* init stack */
+    la      t0, g_system_stack_begin
+    la      t1, g_system_stack_end
+    beq     t0, t1, end_set_stack_loop
+    li      t2, 0xefbeadde
+
+set_stack_loop:
+    sw      t2, (t0)
+    addi    t0, t0, 4
+    blt     t0, t1, set_stack_loop
+end_set_stack_loop:
+
+    tail    runtime_init