first commit

2025-07-03 23:58:20 +08:00
commit ce2b3cdfd4
444 changed files with 65256 additions and 0 deletions
--- a/application/samples/peripheral/CMakeLists.txt
+++ b/application/samples/peripheral/CMakeLists.txt
@ -0,0 +1,116 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+if(DEFINED CONFIG_SAMPLE_SUPPORT_AMIC)
+    add_subdirectory_if_exist(amic)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_BLINKY)
+    add_subdirectory_if_exist(blinky)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_BUTTON)
+    add_subdirectory_if_exist(button)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_TASKS)
+    add_subdirectory_if_exist(tasks)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_TCXO)
+    add_subdirectory_if_exist(tcxo)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_DMA)
+    add_subdirectory_if_exist(dma)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_I2C)
+    add_subdirectory_if_exist(i2c)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_I2S)
+    add_subdirectory_if_exist(i2s)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_KEYSCAN)
+    add_subdirectory_if_exist(keyscan)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_PDM)
+    add_subdirectory_if_exist(pdm)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_PDM_AMIC)
+    add_subdirectory_if_exist(pdm_amic)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_PINCTRL)
+    add_subdirectory_if_exist(pinctrl)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_QDEC)
+    add_subdirectory_if_exist(qdec)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_SFC)
+    add_subdirectory_if_exist(sfc)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_SPI)
+    add_subdirectory_if_exist(spi)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_SYSTICK)
+    add_subdirectory_if_exist(systick)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_WDT)
+    add_subdirectory_if_exist(watchdog)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_PWM)
+    add_subdirectory_if_exist(pwm)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_UART)
+    add_subdirectory_if_exist(uart)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_ADC)
+    add_subdirectory_if_exist(adc)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_RTC)
+    add_subdirectory_if_exist(rtc)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_TIMER)
+    add_subdirectory_if_exist(timer)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_EFLASH)
+    add_subdirectory_if_exist(eflash)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_CALENDAR)
+    add_subdirectory_if_exist(calendar)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_I2S_DMA)
+    add_subdirectory_if_exist(i2s_dma)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_I2S_DMA_LLI)
+    add_subdirectory_if_exist(i2s_dma_lli)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_CAN)
+    add_subdirectory_if_exist(can)
+endif()
+
+if(DEFINED CONFIG_SAMPLE_SUPPORT_CLOCKS)
+    add_subdirectory_if_exist(clocks)
+endif()
+set(SOURCES "${SOURCES}" PARENT_SCOPE)
--- a/application/samples/peripheral/Kconfig
+++ b/application/samples/peripheral/Kconfig
@ -0,0 +1,406 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config ENABLE_ALL_PERIPHERAL_SAMPLE
+    bool
+    prompt "Enable all the sample of peripheral, it's just for build."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    select SAMPLE_SUPPORT_ADC
+    select SAMPLE_SUPPORT_AMIC if ADC_SUPPORT_AMIC
+    select SAMPLE_SUPPORT_BLINKY
+    select SAMPLE_SUPPORT_BUTTON
+    select SAMPLE_SUPPORT_CALENDAR
+    select SAMPLE_SUPPORT_CLOCKS
+    select SAMPLE_SUPPORT_DMA
+    select SAMPLE_SUPPORT_EFLASH
+    select SAMPLE_SUPPORT_I2C
+    select SAMPLE_SUPPORT_I2S
+    select SAMPLE_SUPPORT_I2S_DMA
+    select SAMPLE_SUPPORT_I2S_DMA_LLI
+    select SAMPLE_SUPPORT_KEYSCAN
+    select SAMPLE_SUPPORT_PDM
+    select SAMPLE_SUPPORT_PDM_AMIC if ADC_SUPPORT_AMIC
+    select SAMPLE_SUPPORT_PINCTRL
+    select SAMPLE_SUPPORT_PWM
+    select SAMPLE_SUPPORT_QDEC
+    select SAMPLE_SUPPORT_RTC
+    select SAMPLE_SUPPORT_SPI
+    select SAMPLE_SUPPORT_SYSTICK
+    select SAMPLE_SUPPORT_TASKS
+    select SAMPLE_SUPPORT_TCXO
+    select SAMPLE_SUPPORT_TIMER
+    select SAMPLE_SUPPORT_UART
+    select SAMPLE_SUPPORT_WDT
+    help
+        This option means enable all the sample of peripheral, it is just for build.
+
+config SAMPLE_SUPPORT_ADC
+    bool
+    prompt "Support ADC Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support ADC Sample.
+
+if SAMPLE_SUPPORT_ADC
+menu "ADC Sample Configuration"
+    osource "application/samples/peripheral/adc/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_AMIC
+    bool
+    prompt "Support AMIC Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support AMIC Sample.
+
+if SAMPLE_SUPPORT_AMIC
+menu "AFE Sample Configuration"
+    osource "application/samples/peripheral/amic/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_BLINKY
+    bool
+    prompt "Support BLINKY Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support BLINKY Sample.
+
+if SAMPLE_SUPPORT_BLINKY
+menu "Blinky Sample Configuration"
+    osource "application/samples/peripheral/blinky/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_BUTTON
+    bool
+    prompt "Support BUTTON Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support BUTTON Sample.
+if SAMPLE_SUPPORT_BUTTON
+menu "BUTTON Sample Configuration"
+    osource "application/samples/peripheral/button/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_CALENDAR
+    bool
+    prompt "Support CALENDAR Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support CALENDAR Sample.
+
+if SAMPLE_SUPPORT_CALENDAR
+menu "CALENDAR Sample Configuration"
+    osource "application/samples/peripheral/calendar/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_CAN
+    bool
+    prompt "Support CAN Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    select DRIVER_SUPPORT_CAN_FD
+    help
+        This option means support CAN Sample.
+
+if SAMPLE_SUPPORT_CAN
+menu "CAN Sample Configuration"
+    osource "application/samples/peripheral/can/Kconfig"
+endmenu
+endif
+config SAMPLE_SUPPORT_CLOCKS
+    bool
+    prompt "Support CLOCKS Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support CLOCKS Sample.
+
+if SAMPLE_SUPPORT_CLOCKS
+menu "CLOCKS Sample Configuration"
+    osource "application/samples/peripheral/clocks/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_DMA
+    bool
+    prompt "Support DMA Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support DMA Sample.
+
+if SAMPLE_SUPPORT_DMA
+menu "DMA Sample Configuration"
+    osource "application/samples/peripheral/dma/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_EFLASH
+    bool
+    prompt "Support EFLASH Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support EFLASH Sample.
+
+if SAMPLE_SUPPORT_EFLASH
+menu "EFLASH Sample Configuration"
+    osource "application/samples/peripheral/eflash/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_I2C
+    bool
+    prompt "Support I2C Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support I2C Sample.
+
+if SAMPLE_SUPPORT_I2C
+menu "I2C Sample Configuration"
+    osource "application/samples/peripheral/i2c/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_I2S
+    bool
+    prompt "Support I2S Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support I2S Sample.
+
+if SAMPLE_SUPPORT_I2S
+menu "I2S Sample Configuration"
+    osource "application/samples/peripheral/i2s/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_I2S_DMA
+    bool
+    prompt "Support I2S DMA Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    select I2S_SUPPORT_DMA
+    help
+        This option means support I2S DMA Sample.
+
+if SAMPLE_SUPPORT_I2S_DMA
+menu "I2S DMA Sample Configuration"
+    osource "application/samples/peripheral/i2s_dma/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_I2S_DMA_LLI
+    bool
+    prompt "Support I2S DMA lli Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    select I2S_SUPPORT_DMA
+    help
+        This option means support I2S DMA LLI Sample.
+
+if SAMPLE_SUPPORT_I2S_DMA_LLI
+menu "I2S DMA lli Sample Configuration"
+    osource "application/samples/peripheral/i2s_dma_lli/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_KEYSCAN
+    bool
+    prompt "Support KEYSCAN Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support KEYSCAN Sample.
+
+config SAMPLE_SUPPORT_PDM
+    bool
+    prompt "Support PDM Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support PDM Sample.
+
+if SAMPLE_SUPPORT_PDM
+menu "PDM Sample Configuration"
+    osource "application/samples/peripheral/pdm/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_PDM_AMIC
+    bool
+    prompt "Support PDM AMIC Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE && ADC_SUPPORT_AMIC
+    help
+        This option means support PDM AMIC Sample.
+
+if SAMPLE_SUPPORT_PDM_AMIC
+menu "PDM AMIC Sample Configuration"
+    osource "application/samples/peripheral/pdm_amic/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_PINCTRL
+    bool
+    prompt "Support PINCTRL Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support PINCTRL Sample.
+
+if SAMPLE_SUPPORT_PINCTRL
+menu "PINCTRL Sample Configuration"
+    osource "application/samples/peripheral/pinctrl/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_PWM
+    bool
+    prompt "Support PWM Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support PWM Sample.
+
+if SAMPLE_SUPPORT_PWM
+menu "PWM Sample Configuration"
+    osource "application/samples/peripheral/pwm/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_QDEC
+    bool
+    prompt "Support QDEC Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support QDEC Sample.
+
+if SAMPLE_SUPPORT_QDEC
+menu "QDEC Sample Configuration"
+    osource "application/samples/peripheral/qdec/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_RTC
+    bool
+    prompt "Support RTC Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support RTC Sample.
+
+if SAMPLE_SUPPORT_RTC
+menu "RTC Sample Configuration"
+    osource "application/samples/peripheral/rtc/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_SFC
+    bool
+    prompt "Support SFC Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support SFC Sample.
+
+if SAMPLE_SUPPORT_SFC
+menu "SFC Sample Configuration"
+    osource "application/samples/peripheral/sfc/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_SPI
+    bool
+    prompt "Support SPI Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support SPI Sample.
+
+if SAMPLE_SUPPORT_SPI
+menu "SPI Sample Configuration"
+    osource "application/samples/peripheral/spi/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_SYSTICK
+    bool
+    prompt "Support SYSTICK Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support SYSTICK Sample.
+
+config SAMPLE_SUPPORT_TASKS
+    bool
+    prompt "Support TASKS Test Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support TASKS Test Sample.
+
+config SAMPLE_SUPPORT_TCXO
+    bool
+    prompt "Support TCXO Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support TCXO Sample.
+
+config SAMPLE_SUPPORT_TIMER
+    bool
+    prompt "Support TIMER Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support TIMER Sample.
+
+if SAMPLE_SUPPORT_TIMER
+menu "TIMER Sample Configuration"
+    osource "application/samples/peripheral/timer/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_UART
+    bool
+    prompt "Support UART Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support UART Sample.
+
+if SAMPLE_SUPPORT_UART
+menu "UART Sample Configuration"
+    osource "application/samples/peripheral/uart/Kconfig"
+endmenu
+endif
+
+config SAMPLE_SUPPORT_WDT
+    bool
+    prompt "Support WATCHDOG Sample."
+    default n
+    depends on ENABLE_PERIPHERAL_SAMPLE
+    help
+        This option means support WATCHDOG Sample.
+
+if SAMPLE_SUPPORT_WDT
+menu "WATCHDOG Sample Configuration"
+    osource "application/samples/peripheral/watchdog/Kconfig"
+endmenu
+endif
--- a/application/samples/peripheral/adc/CMakeLists.txt
+++ b/application/samples/peripheral/adc/CMakeLists.txt
@ -0,0 +1,10 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+
+if((DEFINED CONFIG_ADC_USING_V154) OR (DEFINED CONFIG_ADC_USING_V155))
+    set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/adc_demo_inc.c" PARENT_SCOPE)
+else()
+    set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/adc_demo.c" PARENT_SCOPE)
+endif()
--- a/application/samples/peripheral/adc/Kconfig
+++ b/application/samples/peripheral/adc/Kconfig
@ -0,0 +1,25 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config HADC_SELF_CALIBRATION
+    bool
+    prompt "HADC calibration, or use record code."
+    default y
+    depends on ADC_USING_V152
+
+config HADC_SAMPLE
+    bool
+    prompt "Enable HADC sample."
+    default y
+    depends on ADC_USING_V152
+
+config TIMING_SAMPLE
+    bool
+    prompt "Create timing sample irq."
+    default n
+
+config ADC_CHANNEL
+    int
+    prompt "Choose ADC channel."
+    default 5
--- a/application/samples/peripheral/adc/adc.code-workspace
+++ b/application/samples/peripheral/adc/adc.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/adc"
+	}
+}
--- a/application/samples/peripheral/adc/adc_demo_inc.c
+++ b/application/samples/peripheral/adc/adc_demo_inc.c
@ -0,0 +1,53 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: ADC Sample Source. \n
+ *
+ * History: \n
+ * 2023-07-06, Create file. \n
+ */
+#include "pinctrl.h"
+#include "adc.h"
+#include "adc_porting.h"
+#include "common_def.h"
+#include "soc_osal.h"
+#include "app_init.h"
+#include "tcxo.h"
+ 
+#define DELAY_10000MS                   10000
+#define CYCLES                          10
+#define ADC_TASK_PRIO                   26
+#define ADC_TASK_STACK_SIZE             0x1000
+ 
+static void *adc_task(const char *arg)
+{
+    unused(arg);
+    osal_printk("start adc sample\r\n");
+    uapi_adc_init(ADC_CLOCK_NONE);
+    uint8_t adc_channel = CONFIG_ADC_CHANNEL;
+    uint16_t voltage = 0;
+    uint32_t cnt = 0;
+    while (cnt++ < CYCLES) {
+        adc_port_read(adc_channel, &voltage);
+        osal_printk("voltage: %d mv\r\n", voltage);
+        osal_msleep(DELAY_10000MS);
+    }
+    /* 当前测量的电压值和实际值可能有较大差别，请确认是否有分压电阻，如果有分压电阻，则差别符合预期 */
+    uapi_adc_deinit();
+
+    return NULL;
+}
+
+static void adc_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)adc_task, 0, "AdcTask", ADC_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, ADC_TASK_PRIO);
+    }
+    osal_kthread_unlock();
+}
+ 
+/* Run the adc_entry. */
+app_run(adc_entry);
--- a/application/samples/peripheral/blinky/CMakeLists.txt
+++ b/application/samples/peripheral/blinky/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/blinky_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/blinky/Kconfig
+++ b/application/samples/peripheral/blinky/Kconfig
@ -0,0 +1,8 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2024-2024. All rights reserved.
+#===============================================================================
+config BLINKY_PIN
+    int
+    prompt "Choose blinky pin."
+    default 2
--- a/application/samples/peripheral/blinky/blinky.code-workspace
+++ b/application/samples/peripheral/blinky/blinky.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/blinky"
+	}
+}
--- a/application/samples/peripheral/blinky/blinky_demo.c
+++ b/application/samples/peripheral/blinky/blinky_demo.c
@ -0,0 +1,51 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: Blinky Sample Source. \n
+ *
+ * History: \n
+ * 2023-04-03, Create file. \n
+ */
+
+#include "pinctrl.h"
+#include "gpio.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define BLINKY_DURATION_MS        500
+
+#define BLINKY_TASK_PRIO          24
+#define BLINKY_TASK_STACK_SIZE    0x1000
+
+static int blinky_task(const char *arg)
+{
+    unused(arg);
+
+    uapi_pin_set_mode(CONFIG_BLINKY_PIN, HAL_PIO_FUNC_GPIO);
+
+    uapi_gpio_set_dir(CONFIG_BLINKY_PIN, GPIO_DIRECTION_OUTPUT);
+    uapi_gpio_set_val(CONFIG_BLINKY_PIN, GPIO_LEVEL_LOW);
+
+    while (1) {
+        osal_msleep(BLINKY_DURATION_MS);
+        uapi_gpio_toggle(CONFIG_BLINKY_PIN);
+        osal_printk("Blinky working.\r\n");
+    }
+
+    return 0;
+}
+
+static void blinky_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)blinky_task, 0, "BlinkyTask", BLINKY_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, BLINKY_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the blinky_entry. */
+app_run(blinky_entry);
--- a/application/samples/peripheral/dma/CMakeLists.txt
+++ b/application/samples/peripheral/dma/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/dma_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/dma/Kconfig
+++ b/application/samples/peripheral/dma/Kconfig
@ -0,0 +1,9 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config DMA_MEMORY_LLI_TRANSFER_MODE
+    bool
+    prompt "Choose DMA memory to memory lli transfer mode."
+    depends on SAMPLE_SUPPORT_DMA
+    default n
--- a/application/samples/peripheral/dma/dma.code-workspace
+++ b/application/samples/peripheral/dma/dma.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/dma"
+	}
+}
--- a/application/samples/peripheral/dma/dma_demo.c
+++ b/application/samples/peripheral/dma/dma_demo.c
@ -0,0 +1,115 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: DMA Sample Source. \n
+ *
+ * History: \n
+ * 2023-07-06, Create file. \n
+ */
+#include "hal_dma.h"
+#include "soc_osal.h"
+#include "securec.h"
+#include "app_init.h"
+
+#define DMA_TRANSFER_WORD_NUM       32
+#define DMA_TRANSFER_PRIORITY       0
+#define DMA_TRANSFER_WIDTH          2
+#define DMA_TASK_DURATION_MS        500
+
+#define DMA_TASK_PRIO               24
+#define DMA_TASK_STACK_SIZE         0x1000
+
+static uint32_t g_app_dma_src_data[DMA_TRANSFER_WORD_NUM] = { 0 };
+static uint32_t g_app_dma_desc_data[DMA_TRANSFER_WORD_NUM] = { 0 };
+static uint8_t g_dma_trans_done = 0;
+
+static void app_dma_trans_done_callback(uint8_t int_type, uint8_t channel, uintptr_t arg)
+{
+    unused(arg);
+    unused(channel);
+    switch (int_type) {
+        case HAL_DMA_INTERRUPT_TFR:
+            g_dma_trans_done = 1;
+            break;
+        case HAL_DMA_INTERRUPT_BLOCK:
+            g_dma_trans_done = 1;
+            break;
+        case HAL_DMA_INTERRUPT_ERR:
+            osal_printk("DMA transfer error.\r\n");
+            break;
+        default:
+            break;
+    }
+}
+
+static void *dma_task(const char *arg)
+{
+    unused(arg);
+    /* DMA init. */
+    uapi_dma_init();
+    uapi_dma_open();
+
+#if defined(CONFIG_DMA_MEMORY_LLI_TRANSFER_MODE)
+    dma_channel_t dma_channel = DMA_CHANNEL_NONE;
+    dma_channel = uapi_dma_get_lli_channel(0, HAL_DMA_HANDSHAKING_MAX_NUM);
+#endif
+
+    for (uint32_t i = 0; i < DMA_TRANSFER_WORD_NUM; i++) {
+        g_app_dma_src_data[i] = i;
+    }
+    memset_s(g_app_dma_desc_data, DMA_TRANSFER_WORD_NUM, 0, DMA_TRANSFER_WORD_NUM);
+
+    dma_ch_user_memory_config_t transfer_config = { 0 };
+    transfer_config.src = (uint32_t)(uintptr_t)g_app_dma_src_data;
+    transfer_config.dest = (uint32_t)(uintptr_t)g_app_dma_desc_data;
+    transfer_config.transfer_num = DMA_TRANSFER_WORD_NUM;
+    transfer_config.priority = DMA_TRANSFER_PRIORITY;
+    transfer_config.width = DMA_TRANSFER_WIDTH;
+
+    while (1) {
+        osal_msleep(DMA_TASK_DURATION_MS);
+        g_dma_trans_done = 0;
+#if defined(CONFIG_DMA_MEMORY_LLI_TRANSFER_MODE)
+        osal_printk("dma config link list item of memory to memory start!\r\n");
+        if (uapi_dma_transfer_memory_lli(dma_channel, &transfer_config, app_dma_trans_done_callback) == ERRCODE_SUCC) {
+            osal_printk("dma config link list item of memory to memory succ!\r\n");
+        }
+        osal_printk("dma enable lli memory transfer start!\r\n");
+        if (uapi_dma_enable_lli(dma_channel, app_dma_trans_done_callback, (uintptr_t)NULL) == ERRCODE_SUCC) {
+            osal_printk("dma enable lli memory transfer succ!\r\n");
+        }
+        while (!g_dma_trans_done) {}
+        if (uapi_dma_end_transfer(dma_channel) == ERRCODE_SUCC) {
+            osal_printk("dma channel transfer finish!\r\n");
+        }
+#else
+        osal_printk("dma single memory transfer start!\r\n");
+        if (uapi_dma_transfer_memory_single(&transfer_config, app_dma_trans_done_callback,
+                                            (uintptr_t)NULL) == ERRCODE_SUCC) {
+            osal_printk("dma single memory transfer succ!\r\n");
+        }
+        while (!g_dma_trans_done) {}
+        osal_printk("dma checking transfer from 0x%08x to 0x%08x...\r\n", transfer_config.src, transfer_config.dest);
+        if (memcmp((void *)transfer_config.src, (void *)transfer_config.dest, transfer_config.transfer_num) == 0) {
+            osal_printk("dma memory copy test succ, length = %d block\r\n", transfer_config.transfer_num);
+        }
+#endif
+    }
+
+    return NULL;
+}
+
+static void dma_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)dma_task, 0, "DmaTask", DMA_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, DMA_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the dma_entry. */
+app_run(dma_entry);
--- a/application/samples/peripheral/i2c/CMakeLists.txt
+++ b/application/samples/peripheral/i2c/CMakeLists.txt
@ -0,0 +1,9 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+if(DEFINED CONFIG_SAMPLE_SUPPORT_I2C_MASTER)
+    set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/i2c_master_demo.c" PARENT_SCOPE)
+elseif(DEFINED CONFIG_SAMPLE_SUPPORT_I2C_SLAVE)
+    set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/i2c_slave_demo.c" PARENT_SCOPE)
+endif()
--- a/application/samples/peripheral/i2c/Kconfig
+++ b/application/samples/peripheral/i2c/Kconfig
@ -0,0 +1,79 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config SAMPLE_SUPPORT_I2C_MASTER
+    bool
+    prompt "Support I2C Master Sample."
+    default n
+    depends on SAMPLE_SUPPORT_I2C
+    help
+        This option means support I2C Master Sample.
+
+config I2C_MASTER_BUS_ID
+    int
+    prompt "Choose I2C master bus id."
+    depends on SAMPLE_SUPPORT_I2C_MASTER
+    default 2
+
+config I2C_SCL_MASTER_PIN
+    int
+    prompt "Choose I2C SCL master pin."
+    depends on SAMPLE_SUPPORT_I2C_MASTER
+    default 8
+
+config I2C_SDA_MASTER_PIN
+    int
+    prompt "Choose I2C SDA master pin."
+    depends on SAMPLE_SUPPORT_I2C_MASTER
+    default 9
+
+config I2C_MASTER_PIN_MODE
+    int
+    prompt "Choose I2C master pin mode."
+    depends on SAMPLE_SUPPORT_I2C_MASTER
+    default 3
+
+config I2C_SLAVE_ADDR
+    hex
+    prompt "Choose I2C slave addr."
+    depends on SAMPLE_SUPPORT_I2C_MASTER
+    default 0x49
+
+config SAMPLE_SUPPORT_I2C_SLAVE
+    bool
+    prompt "Support I2C Slave Sample."
+    default n
+    depends on SAMPLE_SUPPORT_I2C
+    help
+        This option means support I2C Slave Sample.
+
+config I2C_SLAVE_BUS_ID
+    int
+    prompt "Choose I2C slave bus id."
+    depends on SAMPLE_SUPPORT_I2C_SLAVE
+    default 2
+
+config I2C_SCL_SLAVE_PIN
+    int
+    prompt "Choose I2C SCL slave pin."
+    depends on SAMPLE_SUPPORT_I2C_SLAVE
+    default 8
+
+config I2C_SDA_SLAVE_PIN
+    int
+    prompt "Choose I2C SDA slave pin."
+    depends on SAMPLE_SUPPORT_I2C_SLAVE
+    default 9
+
+config I2C_SLAVE_PIN_MODE
+    int
+    prompt "Choose I2C slave pin mode."
+    depends on SAMPLE_SUPPORT_I2C_SLAVE
+    default 3
+
+config I2C_TRANSFER_LEN
+    int
+    prompt "Choose I2C transfer length."
+    depends on SAMPLE_SUPPORT_I2C
+    default 8
--- a/application/samples/peripheral/i2c/i2c.code-workspace
+++ b/application/samples/peripheral/i2c/i2c.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/i2c"
+	}
+}
--- a/application/samples/peripheral/i2c/i2c_master_demo.c
+++ b/application/samples/peripheral/i2c/i2c_master_demo.c
@ -0,0 +1,104 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: I2C Sample Source. \n
+ *
+ * History: \n
+ * 2023-05-25, Create file. \n
+ */
+#include "pinctrl.h"
+#include "i2c.h"
+#include "soc_osal.h"
+#include "app_init.h"
+#if defined(CONFIG_I2C_SUPPORT_DMA) && (CONFIG_I2C_SUPPORT_DMA == 1)
+#include "dma.h"
+#endif
+
+#define I2C_MASTER_ADDR                   0x0
+#define I2C_SET_BAUDRATE                  400000
+#define I2C_TASK_DURATION_MS              500
+#if defined(CONFIG_I2C_SUPPORT_INT) && (CONFIG_I2C_SUPPORT_INT == 1)
+#define I2C_INT_TRANSFER_DELAY_MS         800
+#endif
+
+#define I2C_TASK_PRIO                     24
+#define I2C_TASK_STACK_SIZE               0x1000
+
+static void app_i2c_init_pin(void)
+{
+    /* I2C pinmux. */
+    uapi_pin_set_mode(CONFIG_I2C_SCL_MASTER_PIN, CONFIG_I2C_MASTER_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_I2C_SDA_MASTER_PIN, CONFIG_I2C_MASTER_PIN_MODE);
+}
+
+static void *i2c_master_task(const char *arg)
+{
+    unused(arg);
+    i2c_data_t data = { 0 };
+
+    uint32_t baudrate = I2C_SET_BAUDRATE;
+    uint8_t hscode = I2C_MASTER_ADDR;
+    uint16_t dev_addr = CONFIG_I2C_SLAVE_ADDR;
+
+#if defined(CONFIG_I2C_SUPPORT_DMA) && (CONFIG_I2C_SUPPORT_DMA == 1)
+    uapi_dma_init();
+    uapi_dma_open();
+#endif  /* CONFIG_I2C_SUPPORT_DMA */
+
+    /* I2C master init config. */
+    app_i2c_init_pin();
+    uapi_i2c_master_init(CONFIG_I2C_MASTER_BUS_ID, baudrate, hscode);
+
+#if defined(CONFIG_I2C_SUPPORT_INT) && (CONFIG_I2C_SUPPORT_INT == 1)
+    uapi_i2c_set_irq_mode(CONFIG_I2C_MASTER_BUS_ID, 1);
+#endif  /* CONFIG_I2C_SUPPORT_INT */
+
+    /* I2C data config. */
+    uint8_t tx_buff[CONFIG_I2C_TRANSFER_LEN] = { 0 };
+    for (uint32_t loop = 0; loop < CONFIG_I2C_TRANSFER_LEN; loop++) {
+        tx_buff[loop] = (loop & 0xFF);
+    }
+
+    uint8_t rx_buff[CONFIG_I2C_TRANSFER_LEN] = { 0 };
+    data.send_buf = tx_buff;
+    data.send_len = CONFIG_I2C_TRANSFER_LEN;
+    data.receive_buf = rx_buff;
+    data.receive_len = CONFIG_I2C_TRANSFER_LEN;
+
+    while (1) {
+        osal_msleep(I2C_TASK_DURATION_MS);
+        osal_printk("i2c%d master send start!\r\n", CONFIG_I2C_MASTER_BUS_ID);
+        if (uapi_i2c_master_write(CONFIG_I2C_MASTER_BUS_ID, dev_addr, &data) == ERRCODE_SUCC) {
+            osal_printk("i2c%d master send succ!\r\n", CONFIG_I2C_MASTER_BUS_ID);
+        } else {
+            continue;
+        }
+#if defined(CONFIG_I2C_SUPPORT_INT) && (CONFIG_I2C_SUPPORT_INT == 1)
+        osal_msleep(I2C_INT_TRANSFER_DELAY_MS);
+#endif
+        osal_printk("i2c%d master receive start!\r\n", CONFIG_I2C_MASTER_BUS_ID);
+        if (uapi_i2c_master_read(CONFIG_I2C_MASTER_BUS_ID, dev_addr, &data) == ERRCODE_SUCC) {
+            for (uint32_t i = 0; i < data.receive_len; i++) {
+                osal_printk("i2c%d master receive data is %x\r\n", CONFIG_I2C_MASTER_BUS_ID, data.receive_buf[i]);
+            }
+            osal_printk("i2c%d master receive succ!\r\n", CONFIG_I2C_MASTER_BUS_ID);
+        }
+    }
+
+    return NULL;
+}
+
+static void i2c_master_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)i2c_master_task, 0, "I2cMasterTask", I2C_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, I2C_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the i2c_master_entry. */
+app_run(i2c_master_entry);
--- a/application/samples/peripheral/i2c/i2c_slave_demo.c
+++ b/application/samples/peripheral/i2c/i2c_slave_demo.c
@ -0,0 +1,101 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: I2C Sample Source. \n
+ *
+ * History: \n
+ * 2023-05-25, Create file. \n
+ */
+#include "pinctrl.h"
+#include "i2c.h"
+#include "soc_osal.h"
+#include "app_init.h"
+#if defined(CONFIG_I2C_SUPPORT_DMA) && (CONFIG_I2C_SUPPORT_DMA == 1)
+#include "dma.h"
+#endif
+
+#define I2C_SLAVE_ADDR                    0x8
+#define I2C_SET_BAUDRATE                  500000
+#define I2C_TASK_DURATION_MS              100
+#if defined(CONFIG_I2C_SUPPORT_DMA) && (CONFIG_I2C_SUPPORT_DMA == 1)
+#define I2C_DMA_TRANSFER_DELAY_MS         500
+#endif
+
+#define I2C_TASK_PRIO                     24
+#define I2C_TASK_STACK_SIZE               0x1000
+
+static void app_i2c_init_pin(void)
+{
+    /* I2C pinmux. */
+    uapi_pin_set_mode(CONFIG_I2C_SCL_SLAVE_PIN, CONFIG_I2C_SLAVE_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_I2C_SDA_SLAVE_PIN, CONFIG_I2C_SLAVE_PIN_MODE);
+}
+
+void *i2c_slave_task(const char *arg)
+{
+    unused(arg);
+    i2c_data_t data = { 0 };
+
+    uint32_t baudrate = I2C_SET_BAUDRATE;
+    uint16_t dev_addr = I2C_SLAVE_ADDR;
+
+#if defined(CONFIG_I2C_SUPPORT_DMA) && (CONFIG_I2C_SUPPORT_DMA == 1)
+    uapi_dma_init();
+    uapi_dma_open();
+#endif  /* CONFIG_I2C_SUPPORT_DMA */
+
+    /* I2C slave init config. */
+    app_i2c_init_pin();
+    uapi_i2c_slave_init(CONFIG_I2C_SLAVE_BUS_ID, baudrate, dev_addr);
+
+#if defined(CONFIG_I2C_SUPPORT_INT) && (CONFIG_I2C_SUPPORT_INT == 1)
+    uapi_i2c_set_irq_mode(CONFIG_I2C_SLAVE_BUS_ID, 1);
+#endif /* CONFIG_I2C_SUPPORT_INT */
+
+    /* I2C data config. */
+    uint8_t tx_buff[CONFIG_I2C_TRANSFER_LEN] = { 0 };
+    for (uint32_t loop = 0; loop < CONFIG_I2C_TRANSFER_LEN; loop++) {
+        tx_buff[loop] = (loop & 0xFF);
+    }
+
+    uint8_t rx_buff[CONFIG_I2C_TRANSFER_LEN] = { 0 };
+    data.send_buf = tx_buff;
+    data.send_len = CONFIG_I2C_TRANSFER_LEN;
+    data.receive_buf = rx_buff;
+    data.receive_len = CONFIG_I2C_TRANSFER_LEN;
+
+    while (1) {
+        osal_msleep(I2C_TASK_DURATION_MS);
+        osal_printk("i2c%d slave receive start!\r\n", CONFIG_I2C_SLAVE_BUS_ID);
+        if (uapi_i2c_slave_read(CONFIG_I2C_SLAVE_BUS_ID, &data) == ERRCODE_SUCC) {
+            for (uint32_t i = 0; i < data.receive_len; i++) {
+                osal_printk("i2c slave receive data is %x\r\n", data.receive_buf[i]);
+            }
+            osal_printk("i2c%d slave receive succ!\r\n", CONFIG_I2C_SLAVE_BUS_ID);
+        }
+        osal_printk("i2c%d slave send start!\r\n", CONFIG_I2C_SLAVE_BUS_ID);
+#if defined(CONFIG_I2C_SUPPORT_DMA) && (CONFIG_I2C_SUPPORT_DMA == 1)
+        osal_msleep(I2C_DMA_TRANSFER_DELAY_MS);
+#endif
+        if (uapi_i2c_slave_write(CONFIG_I2C_SLAVE_BUS_ID, &data) == ERRCODE_SUCC) {
+            osal_printk("i2c%d slave send succ!\r\n", CONFIG_I2C_SLAVE_BUS_ID);
+        }
+    }
+
+    return NULL;
+}
+
+static void i2c_slave_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)i2c_slave_task, 0, "I2cSlaveTask", I2C_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, I2C_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the i2c_slave_entry. */
+app_run(i2c_slave_entry);
--- a/application/samples/peripheral/i2s_dma_lli/CMakeLists.txt
+++ b/application/samples/peripheral/i2s_dma_lli/CMakeLists.txt
@ -0,0 +1,9 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+if(DEFINED CONFIG_SAMPLE_SUPPORT_I2S_DMA_LLI_MASTER)
+    set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/i2s_dma_lli_master_demo.c" PARENT_SCOPE)
+elseif(DEFINED CONFIG_SAMPLE_SUPPORT_I2S_DMA_LLI_SLAVE)
+    set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/i2s_dma_lli_slave_demo.c" PARENT_SCOPE)
+endif()
--- a/application/samples/peripheral/i2s_dma_lli/Kconfig
+++ b/application/samples/peripheral/i2s_dma_lli/Kconfig
@ -0,0 +1,26 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config SAMPLE_SUPPORT_I2S_DMA_LLI_MASTER
+    bool
+    prompt "Support I2S Master Sample."
+    default n
+    depends on SAMPLE_SUPPORT_I2S_DMA_LLI
+    help
+        This option means support I2S Master Sample.
+
+config SAMPLE_SUPPORT_I2S_DMA_LLI_SLAVE
+    bool
+    prompt "Support I2S Slave Sample."
+    default n
+    depends on SAMPLE_SUPPORT_I2S_DMA_LLI
+    help
+        This option means support I2S Slave Sample.
+
+config I2S_TRANSFER_LEN_OF_DMA_LLI
+    int
+    prompt "Set the length of transfer by DMA."
+    default 128
+    help
+        This option means the length of transfer by DMA.
--- a/application/samples/peripheral/i2s_dma_lli/i2s_dma_lli_master_demo.c
+++ b/application/samples/peripheral/i2s_dma_lli/i2s_dma_lli_master_demo.c
@ -0,0 +1,103 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2024-2024. All rights reserved.
+ *
+ * Description: i2s dma master lli Sample Source. \n
+ *
+ * History: \n
+ * 2024-04-26, Create file. \n
+ */
+#include "i2s.h"
+#include "watchdog.h"
+#include "hal_sio.h"
+#include "hal_dma.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define I2S_DIV_NUMBER              32
+#define I2S_CHANNEL_NUMBER          2
+#define I2S_TX_INT_THRESHOLD        7
+#define I2S_RX_INT_THRESHOLD        1
+#define I2S_DMA_SRC_WIDTH           2
+#define I2S_DMA_DEST_WIDTH          2
+#define I2S_DMA_BURST_LENGTH        0
+#define I2S_DMA_TRANS_STEP          2
+
+#define I2S_TASK_PRIO               24
+#define I2S_TASK_STACK_SIZE         0xc00
+
+static uint32_t g_i2s_first_data = 0x10000000;    /* 32 bits */
+static uint32_t g_i2s_send_dma_data[CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI] = { 0 };
+
+static void i2s_dma_master_init(void)
+{
+    uapi_i2s_deinit(SIO_BUS_0);
+    uapi_i2s_init(SIO_BUS_0, NULL);
+    sio_porting_i2s_pinmux();
+    i2s_config_t config = {
+        .drive_mode = MASTER,
+        .transfer_mode = STD_MODE,
+        .data_width = THIRTY_TWO_BIT,
+        .channels_num = TWO_CH,
+        .timing = NONE_TIMING_MODE,
+        .clk_edge = RISING_EDGE,
+        .div_number = I2S_DIV_NUMBER,
+        .number_of_channels = I2S_CHANNEL_NUMBER,
+    };
+    i2s_dma_attr_t attr = {
+        .tx_dma_enable = 1,
+        .tx_int_threshold = I2S_TX_INT_THRESHOLD,
+        .rx_dma_enable = 0,
+        .rx_int_threshold = I2S_RX_INT_THRESHOLD,
+    };
+    uapi_i2s_set_config(SIO_BUS_0, &config);
+    uapi_i2s_dma_config(SIO_BUS_0, &attr);
+}
+
+static void *i2s_dma_master_task(const char *arg)
+{
+    unused(arg);
+    int32_t ret = CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI;
+#if defined(CONFIG_SIO_USING_V151)
+    ret = ERRCODE_SUCC;
+#endif
+    uapi_dma_deinit();
+    i2s_dma_master_init();
+    for (uint32_t i = 0; i < CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI; i += I2S_DMA_TRANS_STEP) {
+        g_i2s_send_dma_data[i] = g_i2s_first_data;
+        g_i2s_send_dma_data[i + 1] = g_i2s_first_data;
+        g_i2s_first_data++;
+    }
+    /* DMA init. */
+    uapi_dma_init();
+    uapi_dma_open();
+    i2s_dma_config_t dma_cfg = {
+        .src_width = I2S_DMA_SRC_WIDTH,
+        .dest_width = I2S_DMA_DEST_WIDTH,
+        .burst_length = I2S_DMA_BURST_LENGTH,
+        .priority = 0,
+    };
+    osal_printk("DMA master transfer start.\r\n");
+    while (1) {
+        uapi_watchdog_kick();
+        if (uapi_i2s_merge_write_by_dma(SIO_BUS_0, &g_i2s_send_dma_data, CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI, &dma_cfg,
+            (uintptr_t)NULL, true) != ret) {
+            osal_printk("master uapi_i2s_merge_write_by_dma error.\r\n");
+        }
+    }
+    return NULL;
+}
+
+static void i2s_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)i2s_dma_master_task, 0, "I2sDmaMasterTask",
+                                      I2S_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, I2S_TASK_PRIO);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the i2s_entry. */
+app_run(i2s_entry);
--- a/application/samples/peripheral/i2s_dma_lli/i2s_dma_lli_slave_demo.c
+++ b/application/samples/peripheral/i2s_dma_lli/i2s_dma_lli_slave_demo.c
@ -0,0 +1,185 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2024-2024. All rights reserved.
+ *
+ * Description: i2s dma slave lli Sample Source. \n
+ *
+ * History: \n
+ * 2024-04-26, Create file. \n
+ */
+#include "i2s.h"
+#include "watchdog.h"
+#include "hal_sio.h"
+#include "hal_dma.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define I2S_DIV_NUMBER              32
+#define I2S_CHANNEL_NUMBER          2
+#define I2S_TX_INT_THRESHOLD        7
+#define I2S_RX_INT_THRESHOLD        1
+#define I2S_DMA_TRANSFER_EVENT      1
+#define I2S_RING_BUFFER_NUMBER      4
+#define I2S_DMA_DATA_CMP_MIDDLE     9
+#define I2S_DMA_DATA_CMP_END        (CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI - 1)
+#define I2S_DMA_TRANS_STEP          2
+
+#define I2S_TASK_PRIO               24
+#define I2S_TASK_STACK_SIZE         0xc00
+
+static uint32_t g_i2s_dma_data0[CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI] = { 0 };
+static uint32_t g_i2s_dma_data1[CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI] = { 0 };
+static uint32_t g_i2s_dma_data2[CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI] = { 0 };
+static uint32_t g_i2s_dma_data3[CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI] = { 0 };
+static uint32_t *g_i2s_dma_data[I2S_RING_BUFFER_NUMBER] = {
+    g_i2s_dma_data0, g_i2s_dma_data1, g_i2s_dma_data2, g_i2s_dma_data3};
+static osal_event g_i2s_dma_id;
+static uint8_t g_transfer_err_flag = 0;
+static uint32_t g_cb_count = 0;
+
+static int32_t i2s_add_dma_lli_node(uint8_t index, dma_channel_t dma_channel, dma_transfer_cb_t trans_done)
+{
+    dma_ch_user_peripheral_config_t transfer_config;
+
+    transfer_config.src = i2s_porting_rx_merge_data_addr_get(SIO_BUS_0);
+    transfer_config.dest = (uint32_t)(uintptr_t)g_i2s_dma_data[index];
+    transfer_config.transfer_num = (uint16_t)CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI;
+    transfer_config.src_handshaking = HAL_DMA_HANDSHAKING_I2S_RX;
+    transfer_config.dest_handshaking = 0;
+    transfer_config.trans_type = HAL_DMA_TRANS_PERIPHERAL_TO_MEMORY_DMA;
+    transfer_config.trans_dir = HAL_DMA_TRANSFER_DIR_PERIPHERAL_TO_MEM;
+    transfer_config.priority = 0;
+    transfer_config.src_width = HAL_DMA_TRANSFER_WIDTH_32;
+    transfer_config.dest_width = HAL_DMA_TRANSFER_WIDTH_32;
+    transfer_config.burst_length = 0;
+    transfer_config.src_increment = HAL_DMA_ADDRESS_INC_NO_CHANGE;
+    transfer_config.dest_increment = HAL_DMA_ADDRESS_INC_INCREMENT;
+    transfer_config.protection = HAL_DMA_PROTECTION_CONTROL_BUFFERABLE;
+
+    errcode_t ret = uapi_dma_configure_peripheral_transfer_lli(dma_channel, &transfer_config, trans_done);
+    if (ret != ERRCODE_SUCC) {
+        osal_printk("%s Configure the DMA fail. %x\r\n", "i2s dma lli", ret);
+        return 1;
+    }
+    return 0;
+}
+
+void app_printf_err(void)
+{
+    if (g_cb_count >= I2S_RING_BUFFER_NUMBER && g_transfer_err_flag) {
+        g_transfer_err_flag = 0;
+        // receive ok
+        if ((g_i2s_dma_data0[0] == g_i2s_dma_data1[0]) && (g_i2s_dma_data1[0] == g_i2s_dma_data2[0]) &&
+            (g_i2s_dma_data2[0] == g_i2s_dma_data3[0]) &&
+            (g_i2s_dma_data0[I2S_DMA_DATA_CMP_MIDDLE] == g_i2s_dma_data1[I2S_DMA_DATA_CMP_MIDDLE]) &&
+            (g_i2s_dma_data1[I2S_DMA_DATA_CMP_MIDDLE] == g_i2s_dma_data2[I2S_DMA_DATA_CMP_MIDDLE]) &&
+            (g_i2s_dma_data2[I2S_DMA_DATA_CMP_MIDDLE] == g_i2s_dma_data3[I2S_DMA_DATA_CMP_MIDDLE]) &&
+            (g_i2s_dma_data0[I2S_DMA_DATA_CMP_END] == g_i2s_dma_data1[I2S_DMA_DATA_CMP_END]) &&
+            (g_i2s_dma_data1[I2S_DMA_DATA_CMP_END] == g_i2s_dma_data2[I2S_DMA_DATA_CMP_END]) &&
+            (g_i2s_dma_data2[I2S_DMA_DATA_CMP_END] == g_i2s_dma_data3[I2S_DMA_DATA_CMP_END])) {
+            osal_printk("recv OK\r\n");
+            return;
+        }
+        // receive error
+        for (uint32_t j = 0; j < I2S_RING_BUFFER_NUMBER; j++) {
+            for (uint32_t i = 0; i < CONFIG_I2S_TRANSFER_LEN_OF_DMA_LLI; i += I2S_DMA_TRANS_STEP) {
+                osal_printk("%d, %d  ~  %x\r\n", j, i, g_i2s_dma_data[j][i]);
+            }
+        }
+    }
+}
+
+static void i2s_dma_trans_done_callback(uint8_t intr, uint8_t channel, uintptr_t arg)
+{
+    unused(channel);
+    unused(arg);
+    switch (intr) {
+        case HAL_DMA_INTERRUPT_TFR:
+            g_cb_count++;
+            if (g_cb_count >= I2S_RING_BUFFER_NUMBER) {
+                g_transfer_err_flag = 1;
+            }
+            if (osal_event_write(&g_i2s_dma_id, I2S_DMA_TRANSFER_EVENT) != OSAL_SUCCESS) {
+                osal_printk("osal_event_write fail!\r\n");
+                return;
+            }
+            break;
+        case HAL_DMA_INTERRUPT_ERR:
+            osal_printk("i2s DMA transfer error.\r\n");
+            break;
+        default:
+            break;
+    }
+}
+
+static void *i2s_dma_slave_task(const char *arg)
+{
+    unused(arg);
+    if (osal_event_init(&g_i2s_dma_id) != OSAL_SUCCESS) {
+        return NULL;
+    }
+    uapi_dma_deinit();
+    uapi_i2s_deinit(SIO_BUS_0);
+    uapi_i2s_init(SIO_BUS_0, NULL);
+    sio_porting_i2s_pinmux();
+    i2s_config_t config = {
+        .drive_mode= SLAVE,
+        .transfer_mode = STD_MODE,
+        .data_width = THIRTY_TWO_BIT,
+        .channels_num = TWO_CH,
+        .timing = NONE_TIMING_MODE,
+        .clk_edge = RISING_EDGE,
+        .div_number = I2S_DIV_NUMBER,
+        .number_of_channels = I2S_CHANNEL_NUMBER,
+    };
+    i2s_dma_attr_t attr = {
+        .tx_dma_enable = 0,
+        .tx_int_threshold = I2S_TX_INT_THRESHOLD,
+        .rx_dma_enable = 1,
+        .rx_int_threshold = I2S_RX_INT_THRESHOLD,
+    };
+
+    uapi_i2s_set_config(SIO_BUS_0, &config);
+    uapi_i2s_dma_config(SIO_BUS_0, &attr);
+
+    /* DMA init. */
+    uapi_dma_init();
+    uapi_dma_open();
+
+    dma_channel_t dma_channel = uapi_dma_get_lli_channel(0, HAL_DMA_HANDSHAKING_MAX_NUM);
+    for (uint8_t i = 0; i < I2S_RING_BUFFER_NUMBER; i++) {
+        if (i2s_add_dma_lli_node(i, dma_channel, i2s_dma_trans_done_callback) != 0) {
+            osal_printk("i2s_add_dma_lli_node fail!\r\n");
+            return NULL;
+        }
+    }
+
+    if (uapi_dma_enable_lli(dma_channel, i2s_dma_trans_done_callback, (uintptr_t)NULL) == ERRCODE_SUCC) {
+        osal_printk("dma enable lli memory transfer succ!\r\n");
+    }
+    hal_sio_set_rx_enable(SIO_BUS_0, 1);
+
+    while (1) {
+        uapi_watchdog_kick();
+        if (!(osal_event_read(&g_i2s_dma_id, I2S_DMA_TRANSFER_EVENT, OSAL_WAIT_FOREVER,
+                              OSAL_WAITMODE_AND | OSAL_WAITMODE_CLR))) {
+            continue;
+        }
+        app_printf_err();
+    }
+    return NULL;
+}
+
+static void i2s_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)i2s_dma_slave_task, 0, "I2sDmaSlaveTask",
+                                      I2S_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, I2S_TASK_PRIO);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the i2s_entry. */
+app_run(i2s_entry);
--- a/application/samples/peripheral/pinctrl/CMakeLists.txt
+++ b/application/samples/peripheral/pinctrl/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/pinctrl_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/pinctrl/Kconfig
+++ b/application/samples/peripheral/pinctrl/Kconfig
@ -0,0 +1,9 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config PINCTRL_USE_PIN
+    int
+    prompt "Choose Pinctrl use pin."
+    depends on SAMPLE_SUPPORT_PINCTRL
+    default 23
--- a/application/samples/peripheral/pinctrl/pinctrl.code-workspace
+++ b/application/samples/peripheral/pinctrl/pinctrl.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/pinctrl"
+	}
+}
--- a/application/samples/peripheral/pinctrl/pinctrl_demo.c
+++ b/application/samples/peripheral/pinctrl/pinctrl_demo.c
@ -0,0 +1,80 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: PINCTRL Sample Source. \n
+ *
+ * History: \n
+ * 2023-07-27, Create file. \n
+ */
+#include "pinctrl.h"
+#include "common_def.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define PINCTRL_PIN_MODE           5
+#define PINCTRL_PIN_DS             3
+#define PINCTRL_PIN_PULL           2
+
+#define PINCTRL_TASK_PRIO          24
+#define PINCTRL_TASK_STACK_SIZE    0x1000
+
+static void *pinctrl_task(const char *arg)
+{
+    unused(arg);
+    pin_t pin = CONFIG_PINCTRL_USE_PIN;
+    pin_mode_t mode;
+    pin_drive_strength_t ds;
+    pin_pull_t pull;
+
+    /* PINCTRL init. */
+    uapi_pin_init();
+
+    osal_printk("start get pin<%d> mode!\r\n", pin);
+    mode = uapi_pin_get_mode(pin);
+    osal_printk("the mode of pin<%d> is %d.\r\n", pin, mode);
+    mode = PINCTRL_PIN_MODE;
+    osal_printk("start set pin<%d> mode<%d>!\r\n", pin, mode);
+    if (uapi_pin_set_mode(pin, mode) == ERRCODE_SUCC && uapi_pin_get_mode(pin) == mode) {
+        osal_printk("set pin<%d> mode<%d> succ.\r\n", pin, mode);
+    }
+
+    osal_printk("\r\n");
+    osal_printk("start get pin<%d> driver-strength!\r\n", pin);
+    ds = uapi_pin_get_ds(pin);
+    osal_printk("The driver-strength of pin<%d> is %d.\r\n", pin, ds);
+    ds = PINCTRL_PIN_DS;
+    osal_printk("start set pin<%d> driver-strength<%d>!\r\n", pin, ds);
+    if (uapi_pin_set_ds(pin, ds) == ERRCODE_SUCC && uapi_pin_get_ds(pin) == ds) {
+        osal_printk("set pin<%d> driver-strength<%d> succ.\r\n", pin, ds);
+    }
+
+    osal_printk("\r\n");
+    osal_printk("start get pin<%d> pull/down status!\r\n", pin);
+    pull = uapi_pin_get_pull(pin);
+    osal_printk("The pull/down status of pin<%d> is %d.\r\n", pin, pull);
+    pull = PINCTRL_PIN_PULL;
+    osal_printk("start set pin<%d> pull/down status<%d>!\r\n", pin, pull);
+    if (uapi_pin_set_pull(pin, pull) == ERRCODE_SUCC && uapi_pin_get_pull(pin) == pull) {
+        osal_printk("set pin<%d> pull/down status<%d> succ.\r\n", pin, pull);
+    }
+
+    /* PINCTRL deinit. */
+    uapi_pin_deinit();
+
+    return NULL;
+}
+
+static void pinctrl_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)pinctrl_task, 0, "PinctrlTask", PINCTRL_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, PINCTRL_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the pinctrl_entry. */
+app_run(pinctrl_entry);
--- a/application/samples/peripheral/pwm/CMakeLists.txt
+++ b/application/samples/peripheral/pwm/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/pwm_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/pwm/Kconfig
+++ b/application/samples/peripheral/pwm/Kconfig
@ -0,0 +1,28 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config PWM_CHANNEL
+    int
+    prompt "Choose PWM Test Channel."
+    depends on SAMPLE_SUPPORT_PWM
+    default 0
+
+config PWM_GROUP_ID
+    int
+    prompt "Choose PWM Test Group ID."
+    depends on SAMPLE_SUPPORT_PWM && PWM_USING_V151
+    default 0
+
+config PWM_PIN
+    int
+    prompt "Choose PWM pin."
+    depends on SAMPLE_SUPPORT_PWM
+    default 20
+
+config PWM_PIN_MODE
+    int
+    prompt "Choose PWM pin mode."
+    default 3
+    depends on SAMPLE_SUPPORT_PWM
+
--- a/application/samples/peripheral/pwm/pwm.code-workspace
+++ b/application/samples/peripheral/pwm/pwm.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/pwm"
+	}
+}
--- a/application/samples/peripheral/pwm/pwm_demo.c
+++ b/application/samples/peripheral/pwm/pwm_demo.c
@ -0,0 +1,84 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: PWM Sample Source. \n
+ *
+ * History: \n
+ * 2023-06-27, Create file. \n
+ */
+#if defined(CONFIG_PWM_SUPPORT_LPM)
+#include "pm_veto.h"
+#endif
+#include "common_def.h"
+#include "pinctrl.h"
+#include "pwm.h"
+#include "tcxo.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define TEST_TCXO_DELAY_1000MS     1000
+
+#define PWM_TASK_PRIO              24
+#define PWM_TASK_STACK_SIZE        0x1000
+
+static errcode_t pwm_sample_callback(uint8_t channel)
+{
+    osal_printk("PWM %d, cycle done. \r\n", channel);
+    return ERRCODE_SUCC;
+}
+
+static void *pwm_task(const char *arg)
+{
+    UNUSED(arg);
+    pwm_config_t cfg_no_repeat = {
+        100,
+        100,
+        0,
+        0xFF,
+        false
+    };
+
+    uapi_pin_set_mode(CONFIG_PWM_PIN, CONFIG_PWM_PIN_MODE);
+    uapi_pwm_deinit();
+    uapi_pwm_init();
+    uapi_pwm_open(CONFIG_PWM_CHANNEL, &cfg_no_repeat);
+
+    uapi_tcxo_delay_ms((uint32_t)TEST_TCXO_DELAY_1000MS);
+    uapi_pwm_unregister_interrupt(CONFIG_PWM_CHANNEL);
+    uapi_pwm_register_interrupt(CONFIG_PWM_CHANNEL, pwm_sample_callback);
+#ifdef CONFIG_PWM_USING_V151
+    uint8_t channel_id = CONFIG_PWM_CHANNEL;
+    /* channel_id can also choose to configure multiple channels, and the third parameter also needs to be adjusted
+        accordingly. */
+    uapi_pwm_set_group(CONFIG_PWM_GROUP_ID, &channel_id, 1);
+    /* Here you can also call the uapi_pwm_start interface to open each channel individually. */
+    uapi_pwm_start_group(CONFIG_PWM_GROUP_ID);
+#else
+    uapi_pwm_start(CONFIG_PWM_CHANNEL);
+#endif
+
+    uapi_tcxo_delay_ms((uint32_t)TEST_TCXO_DELAY_1000MS);
+#ifdef CONFIG_PWM_USING_V151
+    uapi_pwm_close(CONFIG_PWM_GROUP_ID);
+#else
+    uapi_pwm_close(CONFIG_PWM_CHANNEL);
+#endif
+
+    uapi_tcxo_delay_ms((uint32_t)TEST_TCXO_DELAY_1000MS);
+    uapi_pwm_deinit();
+    return NULL;
+}
+
+static void pwm_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)pwm_task, 0, "PwmTask", PWM_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, PWM_TASK_PRIO);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the pwm_entry. */
+app_run(pwm_entry);
--- a/application/samples/peripheral/pwm_light/CMakeLists.txt
+++ b/application/samples/peripheral/pwm_light/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/pwm_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/pwm_light/Kconfig
+++ b/application/samples/peripheral/pwm_light/Kconfig
@ -0,0 +1,28 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config PWM_CHANNEL
+    int
+    prompt "Choose PWM Test Channel."
+    depends on SAMPLE_SUPPORT_PWM
+    default 0
+
+config PWM_GROUP_ID
+    int
+    prompt "Choose PWM Test Group ID."
+    depends on SAMPLE_SUPPORT_PWM && PWM_USING_V151
+    default 0
+
+config PWM_PIN
+    int
+    prompt "Choose PWM pin."
+    depends on SAMPLE_SUPPORT_PWM
+    default 20
+
+config PWM_PIN_MODE
+    int
+    prompt "Choose PWM pin mode."
+    default 3
+    depends on SAMPLE_SUPPORT_PWM
+
--- a/application/samples/peripheral/pwm_light/pwm.code-workspace
+++ b/application/samples/peripheral/pwm_light/pwm.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/pwm"
+	}
+}
--- a/application/samples/peripheral/pwm_light/pwm_demo.c
+++ b/application/samples/peripheral/pwm_light/pwm_demo.c
@ -0,0 +1,96 @@
+#include "pinctrl.h"
+#include "gpio.h"
+#include "pwm.h"
+#include "timer.h"
+
+#define LIGHT_GPIO_W    GPIO_02
+#define LIGHT_GPIO_Y    GPIO_08
+
+static uint32_t period_ns = 40000;  //80M/2K
+static uint8_t channel_id_w = 0;
+static uint8_t channel_id_y = 0;
+static uint32_t high_ns = 0;
+static uint32_t low_ns = 0;
+void hfgpio_pwm_init(void)
+{
+    high_ns = ((period_ns / 1000) * 0) / 1000; // 高电平时间
+    low_ns = period_ns - high_ns;              // 低电平时间
+    pwm_config_t cfg_no_repeat = {
+        low_ns,
+        high_ns,
+        0,
+        0xFF,
+        true
+    };
+    channel_id_w = LIGHT_GPIO_W % 8;
+    channel_id_y = LIGHT_GPIO_Y % 8;
+
+    uapi_pin_set_mode(LIGHT_GPIO_W, PIN_MODE_1);
+    uapi_pin_set_mode(LIGHT_GPIO_Y, PIN_MODE_1);
+    uapi_pwm_deinit();
+    uapi_pwm_init();
+    uapi_pwm_open(channel_id_w, &cfg_no_repeat);
+    uapi_pwm_set_group(channel_id_w, &channel_id_w, 1);
+    uapi_pwm_start_group(channel_id_w);
+
+    uapi_pwm_open(channel_id_y, &cfg_no_repeat);
+    uapi_pwm_set_group(channel_id_y, &channel_id_y, 1);
+    uapi_pwm_start_group(channel_id_y);
+}
+
+static void hfgpio_pwm_update(int fid, uint32_t hrate)
+{
+    high_ns = ((period_ns / 1000) * hrate) / 1000; // 高电平时间
+    low_ns = period_ns - high_ns;                  // 低电平时间
+
+    if(fid == LIGHT_GPIO_W){
+        uapi_pwm_update_duty_ratio(channel_id_w, low_ns, high_ns);
+        uapi_pwm_start_group(channel_id_w);
+    }else if(fid == LIGHT_GPIO_Y){
+        uapi_pwm_update_duty_ratio(channel_id_y, low_ns, high_ns);
+        uapi_pwm_start_group(channel_id_y);
+    }
+}
+
+static int pwm_hrate = 0;
+static int dir_flag = 0;
+static timer_handle_t timer1_handle = 0;
+static void light_dim_timer_callback(uintptr_t data)
+{
+    if(data){}
+    if(dir_flag == 0){
+        pwm_hrate++;
+        if(pwm_hrate == 1000){
+            dir_flag = 1;
+        }
+    }
+    else if(dir_flag == 1){
+        pwm_hrate--;
+        if(pwm_hrate == 0){
+            dir_flag = 0;
+        }
+    }
+    hfgpio_pwm_update(LIGHT_GPIO_W, pwm_hrate);
+    hfgpio_pwm_update(LIGHT_GPIO_Y, pwm_hrate);
+
+    uapi_timer_start(timer1_handle, 5000, light_dim_timer_callback, 0);
+}
+
+void light_hwtimer_dim_entry(void)
+{
+    uapi_timer_init();
+    int ret = 0;
+    ret = uapi_timer_adapter(TIMER_INDEX_1, TIMER_1_IRQN, 1);
+    ret = uapi_timer_create(TIMER_INDEX_1, &timer1_handle);
+    ret = uapi_timer_start(timer1_handle, 1000, light_dim_timer_callback, 0);
+    if(ret != 0)
+        osal_printk("hwtimer start fail\r\n");
+    else
+        osal_printk("hwtimer start success\r\n");
+}
+
+void pwm_test(void)
+{
+	hfgpio_pwm_init();
+	light_hwtimer_dim_entry();
+}
--- a/application/samples/peripheral/sfc/CMakeLists.txt
+++ b/application/samples/peripheral/sfc/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/sfc_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/sfc/Kconfig
+++ b/application/samples/peripheral/sfc/Kconfig
@ -0,0 +1,15 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config SFC_SAMPLE_USER_ADDR
+    hex
+    prompt "choose SFC sample Start Address(Real address of the flash memory)."
+    depends on SAMPLE_SUPPORT_SFC
+    default 0x7C000
+
+config SFC_SAMPLE_USER_SIZE
+    hex
+    prompt "choose SFC sample End Address(Real address of the flash memory)."
+    depends on SAMPLE_SUPPORT_SFC
+    default 0x1000
--- a/application/samples/peripheral/sfc/sfc.code-workspace
+++ b/application/samples/peripheral/sfc/sfc.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/sfc"
+	}
+}
--- a/application/samples/peripheral/sfc/sfc_demo.c
+++ b/application/samples/peripheral/sfc/sfc_demo.c
@ -0,0 +1,84 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2024-2024. All rights reserved.
+ *
+ * Description: Provides SFC sample source \n
+ *
+ * History: \n
+ * 2024-03-04, Create file. \n
+ */
+#include "soc_osal.h"
+#include "securec.h"
+#include "sfc.h"
+#include "sfc_porting.h"
+#include "app_init.h"
+#include "memory_config_common.h"
+
+#define SFC_TASK_PRIO                   24
+#define SFC_TASK_STACK_SIZE             0x1000
+#define SFC_SAMPLE_LEN                  0x80000
+#define SFC_PRINT_BUFF_LEN              32
+uint8_t g_print_data_buff[SFC_PRINT_BUFF_LEN] = {0};
+uint8_t g_write_data_buff[SFC_PRINT_BUFF_LEN] = {0};
+
+static void sfc_sample_start_api_test(void)
+{
+    osal_printk("API test start\r\n");
+    uint32_t remained_len = CONFIG_SFC_SAMPLE_USER_SIZE;
+    uint32_t start_addr = CONFIG_SFC_SAMPLE_USER_ADDR;
+    while (remained_len > 0) {
+        uint32_t cur_len = remained_len > SFC_PRINT_BUFF_LEN ? SFC_PRINT_BUFF_LEN : remained_len;
+        uapi_sfc_reg_read(start_addr, g_print_data_buff, cur_len);
+        for (uint8_t i = 0; i < cur_len; i++) {
+            osal_printk("%02x ", g_print_data_buff[i]);
+        }
+        uapi_sfc_reg_write(start_addr, g_write_data_buff, cur_len);
+        start_addr += cur_len;
+        remained_len -= cur_len;
+        osal_printk("\r\n");
+    }
+    start_addr = CONFIG_SFC_SAMPLE_USER_ADDR;
+    remained_len = CONFIG_SFC_SAMPLE_USER_SIZE;
+    while (remained_len > 0) {
+        uint32_t cur_len = remained_len > SFC_PRINT_BUFF_LEN ? SFC_PRINT_BUFF_LEN : remained_len;
+        uapi_sfc_reg_read(start_addr, g_print_data_buff, cur_len);
+        for (uint8_t i = 0; i < cur_len; i++) {
+            osal_printk("%02x ", g_print_data_buff[i]);
+        }
+        start_addr += cur_len;
+        remained_len -= cur_len;
+        osal_printk("\r\n");
+    }
+}
+
+static void *sfc_task(const char *arg)
+{
+    unused(arg);
+    for (uint8_t i = 0; i < SFC_PRINT_BUFF_LEN; i++) {
+        g_write_data_buff[i] = i;
+    }
+    /* Erase User space */
+    osal_printk("Erasing for API sample...\r\n");
+    errcode_t ret = uapi_sfc_reg_erase(CONFIG_SFC_SAMPLE_USER_ADDR, CONFIG_SFC_SAMPLE_USER_SIZE);
+    if (ret != ERRCODE_SUCC) {
+        osal_printk("flash erase failed! ret = %x\r\n", ret);
+        return NULL;
+    }
+    osal_printk("Start API read sample...\r\n");
+    sfc_sample_start_api_test();
+    return NULL;
+}
+
+static void sfc_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)sfc_task, 0, "SFCTask", SFC_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, SFC_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the spi_master_entry. */
+app_run(sfc_entry);
--- a/application/samples/peripheral/spi/CMakeLists.txt
+++ b/application/samples/peripheral/spi/CMakeLists.txt
@ -0,0 +1,9 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+if(DEFINED CONFIG_SAMPLE_SUPPORT_SPI_MASTER)
+    set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/spi_master_demo.c" PARENT_SCOPE)
+elseif(DEFINED CONFIG_SAMPLE_SUPPORT_SPI_SLAVE)
+    set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/spi_slave_demo.c" PARENT_SCOPE)
+endif()
--- a/application/samples/peripheral/spi/Kconfig
+++ b/application/samples/peripheral/spi/Kconfig
@ -0,0 +1,127 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config SAMPLE_SUPPORT_SPI_MASTER
+    bool
+    prompt "Support SPI Master Sample."
+    default n
+    depends on SAMPLE_SUPPORT_SPI
+    help
+        This option means support SPI Master Sample.
+
+config SPI_MASTER_BUS_ID
+    int
+    prompt "Choose SPI master bus id."
+    depends on SAMPLE_SUPPORT_SPI_MASTER
+    default 2
+
+config SPI_DI_MASTER_PIN
+    int
+    prompt "Choose SPI DI master pin."
+    depends on SAMPLE_SUPPORT_SPI_MASTER
+    default 16
+
+config SPI_DO_MASTER_PIN
+    int
+    prompt "Choose SPI DO master pin."
+    depends on SAMPLE_SUPPORT_SPI_MASTER
+    default 17
+
+config SPI_CLK_MASTER_PIN
+    int
+    prompt "Choose SPI CLK master pin."
+    depends on SAMPLE_SUPPORT_SPI_MASTER
+    default 18
+
+config SPI_CS_MASTER_PIN
+    int
+    prompt "Choose SPI CS master pin."
+    depends on SAMPLE_SUPPORT_SPI_MASTER
+    default 19
+
+config SPI_MASTER_PIN_MODE
+    int
+    prompt "Choose SPI master pin mode."
+    depends on SAMPLE_SUPPORT_SPI_MASTER
+    default 1
+
+config SPI_MASTER_SUPPORT_QSPI
+    bool
+    prompt "SPI master support QSPI."
+    depends on SAMPLE_SUPPORT_SPI_MASTER
+    default n
+
+config SPI_MASTER_D3_PIN_MODE
+    int
+    prompt "Choose QSPI master D3 pin mode."
+    depends on SPI_MASTER_SUPPORT_QSPI
+    default 1
+
+config SPI_MASTER_D2_PIN_MODE
+    int
+    prompt "Choose QSPI master D2 pin mode."
+    depends on SPI_MASTER_SUPPORT_QSPI
+    default 1
+
+config SPI_MASTER_D3_PIN
+    int
+    prompt "Choose QSPI master D3 pin."
+    depends on SPI_MASTER_SUPPORT_QSPI
+    default 40
+
+config SPI_MASTER_D2_PIN
+    int
+    prompt "Choose QSPI master D2 pin."
+    depends on SPI_MASTER_SUPPORT_QSPI
+    default 41
+
+config SAMPLE_SUPPORT_SPI_SLAVE
+    bool
+    prompt "Support SPI Slave Sample."
+    default n
+    depends on SAMPLE_SUPPORT_SPI
+    help
+        This option means support SPI Slave Sample.
+
+config SPI_SLAVE_BUS_ID
+    int
+    prompt "Choose SPI slave bus id."
+    depends on SAMPLE_SUPPORT_SPI_SLAVE
+    default 4
+
+config SPI_DI_SLAVE_PIN
+    int
+    prompt "Choose SPI DI slave pin."
+    depends on SAMPLE_SUPPORT_SPI_SLAVE
+    default 12
+
+config SPI_DO_SLAVE_PIN
+    int
+    prompt "Choose SPI DO slave pin."
+    depends on SAMPLE_SUPPORT_SPI_SLAVE
+    default 13
+
+config SPI_CLK_SLAVE_PIN
+    int
+    prompt "Choose SPI CLK slave pin."
+    depends on SAMPLE_SUPPORT_SPI_SLAVE
+    default 14
+
+config SPI_CS_SLAVE_PIN
+    int
+    prompt "Choose SPI CS slave pin."
+    depends on SAMPLE_SUPPORT_SPI_SLAVE
+    default 15
+
+config SPI_SLAVE_PIN_MODE
+    int
+    prompt "Choose SPI slave pin mode."
+    depends on SAMPLE_SUPPORT_SPI_SLAVE
+    default 5
+
+config SPI_TRANSFER_LEN
+    int
+    prompt "Choose SPI transfer length."
+    depends on SAMPLE_SUPPORT_SPI
+    default 8
--- a/application/samples/peripheral/spi/spi.code-workspace
+++ b/application/samples/peripheral/spi/spi.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/spi"
+	}
+}
--- a/application/samples/peripheral/spi/spi_master_demo.c
+++ b/application/samples/peripheral/spi/spi_master_demo.c
@ -0,0 +1,187 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: SPI Sample Source. \n
+ *
+ * History: \n
+ * 2023-06-25, Create file. \n
+ */
+#include "pinctrl.h"
+#include "spi.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define SPI_SLAVE_NUM                   1
+#define SPI_FREQUENCY                   2
+#define SPI_CLK_POLARITY                0
+#define SPI_CLK_PHASE                   0
+#define SPI_FRAME_FORMAT                0
+#define SPI_FRAME_FORMAT_STANDARD       0
+#define SPI_FRAME_SIZE_8                0x1f
+#define SPI_TMOD                        0
+#define SPI_WAIT_CYCLES                 0x10
+#if defined(CONFIG_SPI_SUPPORT_DMA) && !(defined(CONFIG_SPI_SUPPORT_POLL_AND_DMA_AUTO_SWITCH))
+#define SPI_DMA_WIDTH                   2
+#endif
+#if defined(CONFIG_SPI_MASTER_SUPPORT_QSPI)
+#define QSPI_WRITE_CMD                  0x38
+#define QSPI_WRITE_ADDR                 0x123
+#endif
+#define SPI_TASK_DURATION_MS            500
+#define SPI_TASK_PRIO                   24
+#define SPI_TASK_STACK_SIZE             0x1000
+
+static void app_spi_init_pin(void)
+{
+    uapi_pin_set_mode(CONFIG_SPI_DI_MASTER_PIN, CONFIG_SPI_MASTER_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_SPI_DO_MASTER_PIN, CONFIG_SPI_MASTER_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_SPI_CLK_MASTER_PIN, CONFIG_SPI_MASTER_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_SPI_CS_MASTER_PIN, CONFIG_SPI_MASTER_PIN_MODE);
+#if defined(CONFIG_SPI_MASTER_SUPPORT_QSPI)
+    uapi_pin_set_mode(CONFIG_SPI_MASTER_D2_PIN, CONFIG_SPI_MASTER_D2_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_SPI_MASTER_D3_PIN, CONFIG_SPI_MASTER_D3_PIN_MODE);
+#endif
+}
+
+#if defined(CONFIG_SPI_SUPPORT_INTERRUPT) && (CONFIG_SPI_SUPPORT_INTERRUPT == 1)
+static void app_spi_master_write_int_handler(const void *buffer, uint32_t length)
+{
+    unused(buffer);
+    unused(length);
+    osal_printk("spi master write interrupt start!\r\n");
+}
+
+static void app_spi_master_rx_callback(const void *buffer, uint32_t length, bool error)
+{
+    if (buffer == NULL || length == 0) {
+        osal_printk("spi master transfer illegal data!\r\n");
+        return;
+    }
+    if (error) {
+        osal_printk("app_spi_master_read_int error!\r\n");
+        return;
+    }
+
+    uint8_t *buff = (uint8_t *)buffer;
+    for (uint32_t i = 0; i < length; i++) {
+        osal_printk("buff[%d] = %x\r\n", i, buff[i]);
+    }
+    osal_printk("app_spi_master_read_int success!\r\n");
+}
+#endif  /* CONFIG_SPI_SUPPORT_INTERRUPT */
+
+static void app_spi_master_init_config(void)
+{
+    spi_attr_t config = { 0 };
+    spi_extra_attr_t ext_config = { 0 };
+
+    config.is_slave = false;
+    config.slave_num = SPI_SLAVE_NUM;
+    config.bus_clk = SPI_CLK_FREQ;
+    config.freq_mhz = SPI_FREQUENCY;
+    config.clk_polarity = SPI_CLK_POLARITY;
+    config.clk_phase = SPI_CLK_PHASE;
+    config.frame_format = SPI_FRAME_FORMAT;
+    config.spi_frame_format = HAL_SPI_FRAME_FORMAT_STANDARD;
+    config.frame_size = SPI_FRAME_SIZE_8;
+    config.tmod = SPI_TMOD;
+    config.sste = 0;
+
+    ext_config.qspi_param.wait_cycles = SPI_WAIT_CYCLES;
+#if defined(CONFIG_SPI_MASTER_SUPPORT_QSPI)
+    config.tmod = HAL_SPI_TRANS_MODE_TX;
+    config.sste = 0;
+    config.spi_frame_format = HAL_SPI_FRAME_FORMAT_QUAD;
+    ext_config.qspi_param.trans_type = HAL_SPI_TRANS_TYPE_INST_S_ADDR_Q;
+    ext_config.qspi_param.inst_len = HAL_SPI_INST_LEN_8;
+    ext_config.qspi_param.addr_len = HAL_SPI_ADDR_LEN_24;
+    ext_config.qspi_param.wait_cycles = 0;
+#endif
+
+    uapi_spi_init(CONFIG_SPI_MASTER_BUS_ID, &config, &ext_config);
+#if defined(CONFIG_SPI_SUPPORT_DMA) && (CONFIG_SPI_SUPPORT_DMA == 1)
+    uapi_dma_init();
+    uapi_dma_open();
+#ifndef CONFIG_SPI_SUPPORT_POLL_AND_DMA_AUTO_SWITCH
+    spi_dma_config_t dma_cfg = {
+        .src_width = SPI_DMA_WIDTH,
+        .dest_width = SPI_DMA_WIDTH,
+        .burst_length = 0,
+        .priority = 0
+    };
+    if (uapi_spi_set_dma_mode(CONFIG_SPI_MASTER_BUS_ID, true, &dma_cfg) != ERRCODE_SUCC) {
+        osal_printk("spi%d master set dma mode fail!\r\n");
+    }
+#endif
+#endif  /* CONFIG_SPI_SUPPORT_DMA */
+
+#if defined(CONFIG_SPI_SUPPORT_INTERRUPT) && (CONFIG_SPI_SUPPORT_INTERRUPT == 1)
+    if (uapi_spi_set_irq_mode(CONFIG_SPI_MASTER_BUS_ID, true, app_spi_master_rx_callback,
+        app_spi_master_write_int_handler) == ERRCODE_SUCC) {
+        osal_printk("spi%d master set irq mode succ!\r\n", CONFIG_SPI_MASTER_BUS_ID);
+    }
+#endif  /* CONFIG_SPI_SUPPORT_INTERRUPT */
+}
+
+static void *spi_master_task(const char *arg)
+{
+    unused(arg);
+    /* SPI pinmux. */
+    app_spi_init_pin();
+
+    /* SPI master init config. */
+    app_spi_master_init_config();
+
+    /* SPI data config. */
+    uint8_t tx_data[CONFIG_SPI_TRANSFER_LEN] = { 0 };
+    for (uint32_t loop = 0; loop < CONFIG_SPI_TRANSFER_LEN; loop++) {
+        tx_data[loop] = (loop & 0xFF);
+    }
+    uint8_t rx_data[CONFIG_SPI_TRANSFER_LEN] = { 0 };
+    spi_xfer_data_t data = {
+        .tx_buff = tx_data,
+        .tx_bytes = CONFIG_SPI_TRANSFER_LEN,
+        .rx_buff = rx_data,
+        .rx_bytes = CONFIG_SPI_TRANSFER_LEN,
+#if defined(CONFIG_SPI_MASTER_SUPPORT_QSPI)
+        .cmd = QSPI_WRITE_CMD,
+        .addr = QSPI_WRITE_ADDR,
+#endif
+    };
+
+    while (1) {
+        osal_msleep(SPI_TASK_DURATION_MS);
+        osal_printk("spi%d master send start!\r\n", CONFIG_SPI_MASTER_BUS_ID);
+        if (uapi_spi_master_write(CONFIG_SPI_MASTER_BUS_ID, &data, 0xFFFFFFFF) == ERRCODE_SUCC) {
+            osal_printk("spi%d master send succ!\r\n", CONFIG_SPI_MASTER_BUS_ID);
+        } else {
+            continue;
+        }
+        osal_printk("spi%d master receive start!\r\n", CONFIG_SPI_MASTER_BUS_ID);
+        if (uapi_spi_master_read(CONFIG_SPI_MASTER_BUS_ID, &data, 0xFFFFFFFF) == ERRCODE_SUCC) {
+#ifndef CONFIG_SPI_SUPPORT_INTERRUPT
+            for (uint32_t i = 0; i < data.rx_bytes; i++) {
+                osal_printk("spi%d master receive data is %x\r\n", CONFIG_SPI_MASTER_BUS_ID, data.rx_buff[i]);
+            }
+#endif
+            osal_printk("spi%d master receive succ!\r\n", CONFIG_SPI_MASTER_BUS_ID);
+        }
+    }
+
+    return NULL;
+}
+
+static void spi_master_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)spi_master_task, 0, "SpiMasterTask", SPI_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, SPI_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the spi_master_entry. */
+app_run(spi_master_entry);
--- a/application/samples/peripheral/spi/spi_slave_demo.c
+++ b/application/samples/peripheral/spi/spi_slave_demo.c
@ -0,0 +1,167 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: SPI Sample Source. \n
+ *
+ * History: \n
+ * 2023-06-25, Create file. \n
+ */
+#include "pinctrl.h"
+#include "spi.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define SPI_SLAVE_NUM                   1
+#define SPI_FREQUENCY                   2
+#define SPI_CLK_POLARITY                0
+#define SPI_CLK_PHASE                   0
+#define SPI_FRAME_FORMAT                0
+#define SPI_FRAME_FORMAT_STANDARD       0
+#define SPI_FRAME_SIZE_8                0x1f
+#define SPI_TMOD                        0
+#define SPI_WAIT_CYCLES                 0x10
+#if defined(CONFIG_SPI_SUPPORT_DMA) && !(defined(CONFIG_SPI_SUPPORT_POLL_AND_DMA_AUTO_SWITCH))
+#define SPI_DMA_WIDTH                   2
+#endif
+
+#define SPI_TASK_DURATION_MS            500
+#define SPI_TASK_PRIO                   24
+#define SPI_TASK_STACK_SIZE             0x1000
+
+static void app_spi_init_pin(void)
+{
+    uapi_pin_set_mode(CONFIG_SPI_DI_SLAVE_PIN, CONFIG_SPI_SLAVE_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_SPI_DO_SLAVE_PIN, CONFIG_SPI_SLAVE_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_SPI_CLK_SLAVE_PIN, CONFIG_SPI_SLAVE_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_SPI_CS_SLAVE_PIN, CONFIG_SPI_SLAVE_PIN_MODE);
+}
+
+#if defined(CONFIG_SPI_SUPPORT_INTERRUPT) && (CONFIG_SPI_SUPPORT_INTERRUPT == 1)
+static void app_spi_slave_write_int_handler(const void *buffer, uint32_t length)
+{
+    unused(buffer);
+    unused(length);
+    osal_printk("spi slave write interrupt start!\r\n");
+}
+
+static void app_spi_slave_rx_callback(const void *buffer, uint32_t length, bool error)
+{
+    if (buffer == NULL || length == 0) {
+        osal_printk("spi slave transfer illegal data!\r\n");
+        return;
+    }
+    if (error) {
+        osal_printk("app_spi_slave_read_int error!\r\n");
+        return;
+    }
+
+    uint8_t *buff = (uint8_t *)buffer;
+    for (uint32_t i = 0; i < length; i++) {
+        osal_printk("buff[%d] = %x\r\n", i, buff[i]);
+    }
+    osal_printk("app_spi_slave_read_int success!\r\n");
+}
+#endif  /* CONFIG_SPI_SUPPORT_INTERRUPT */
+
+static void app_spi_slave_init_config(void)
+{
+    spi_attr_t config = { 0 };
+    spi_extra_attr_t ext_config = { 0 };
+
+    config.is_slave = true;
+    config.slave_num = SPI_SLAVE_NUM;
+    config.bus_clk = SPI_CLK_FREQ;
+    config.freq_mhz = SPI_FREQUENCY;
+    config.clk_polarity = SPI_CLK_POLARITY;
+    config.clk_phase = SPI_CLK_PHASE;
+    config.frame_format = SPI_FRAME_FORMAT;
+    config.spi_frame_format = HAL_SPI_FRAME_FORMAT_STANDARD;
+    config.frame_size = SPI_FRAME_SIZE_8;
+    config.tmod = SPI_TMOD;
+    config.sste = 0;
+
+    ext_config.qspi_param.wait_cycles = SPI_WAIT_CYCLES;
+
+    uapi_spi_init(CONFIG_SPI_SLAVE_BUS_ID, &config, &ext_config);
+#if defined(CONFIG_SPI_SUPPORT_DMA) && (CONFIG_SPI_SUPPORT_DMA == 1)
+    uapi_dma_init();
+    uapi_dma_open();
+#ifndef CONFIG_SPI_SUPPORT_POLL_AND_DMA_AUTO_SWITCH
+    spi_dma_config_t dma_cfg = {
+        .src_width = SPI_DMA_WIDTH,
+        .dest_width = SPI_DMA_WIDTH,
+        .burst_length = 0,
+        .priority = 0
+    };
+    if (uapi_spi_set_dma_mode(CONFIG_SPI_SLAVE_BUS_ID, true, &dma_cfg) != ERRCODE_SUCC) {
+        osal_printk("spi%d slave set dma mode fail!\r\n");
+    }
+#endif
+#endif  /* CONFIG_SPI_SUPPORT_DMA */
+
+#if defined(CONFIG_SPI_SUPPORT_INTERRUPT) && (CONFIG_SPI_SUPPORT_INTERRUPT == 1)
+    if (uapi_spi_set_irq_mode(CONFIG_SPI_SLAVE_BUS_ID, true, app_spi_slave_rx_callback,
+        app_spi_slave_write_int_handler) == ERRCODE_SUCC) {
+        osal_printk("spi%d slave set irq mode succ!\r\n", CONFIG_SPI_SLAVE_BUS_ID);
+    }
+#endif  /* CONFIG_SPI_SUPPORT_INTERRUPT */
+}
+
+static void *spi_slave_task(const char *arg)
+{
+    unused(arg);
+    /* SPI pinmux. */
+    app_spi_init_pin();
+
+    /* SPI slave init config. */
+    app_spi_slave_init_config();
+
+    /* SPI data config. */
+    uint8_t tx_data[CONFIG_SPI_TRANSFER_LEN] = { 0 };
+    for (uint32_t loop = 0; loop < CONFIG_SPI_TRANSFER_LEN; loop++) {
+        tx_data[loop] = (loop & 0xFF);
+    }
+    uint8_t rx_data[CONFIG_SPI_TRANSFER_LEN] = { 0 };
+    spi_xfer_data_t data = {
+        .tx_buff = tx_data,
+        .tx_bytes = CONFIG_SPI_TRANSFER_LEN,
+        .rx_buff = rx_data,
+        .rx_bytes = CONFIG_SPI_TRANSFER_LEN,
+    };
+
+    while (1) {
+        osal_msleep(SPI_TASK_DURATION_MS);
+        osal_printk("spi%d slave receive start!\r\n", CONFIG_SPI_SLAVE_BUS_ID);
+        if (uapi_spi_slave_read(CONFIG_SPI_SLAVE_BUS_ID, &data, 0xFFFFFFFF) == ERRCODE_SUCC) {
+#ifndef CONFIG_SPI_SUPPORT_INTERRUPT
+            for (uint32_t i = 0; i < data.rx_bytes; i++) {
+                osal_printk("spi%d slave receive data is %x\r\n", CONFIG_SPI_SLAVE_BUS_ID, data.rx_buff[i]);
+            }
+#endif
+            osal_printk("spi%d slave receive succ!\r\n", CONFIG_SPI_SLAVE_BUS_ID);
+        } else {
+            continue;
+        }
+        osal_printk("spi%d slave send start!\r\n", CONFIG_SPI_SLAVE_BUS_ID);
+        if (uapi_spi_slave_write(CONFIG_SPI_SLAVE_BUS_ID, &data, 0xFFFFFFFF) == ERRCODE_SUCC) {
+            osal_printk("spi%d slave send succ!\r\n", CONFIG_SPI_SLAVE_BUS_ID);
+        }
+    }
+
+    return NULL;
+}
+
+static void spi_slave_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)spi_slave_task, 0, "SpiSlaveTask", SPI_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, SPI_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the spi_slave_entry. */
+app_run(spi_slave_entry);
--- a/application/samples/peripheral/systick/CMakeLists.txt
+++ b/application/samples/peripheral/systick/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/systick_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/systick/systick.code-workspace
+++ b/application/samples/peripheral/systick/systick.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/systick"
+	}
+}
--- a/application/samples/peripheral/systick/systick_demo.c
+++ b/application/samples/peripheral/systick/systick_demo.c
@ -0,0 +1,87 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: SYSTICK Sample Source. \n
+ *
+ * History: \n
+ * 2023-07-17, Create file. \n
+ */
+#include "pinctrl.h"
+#include "systick.h"
+#include "common_def.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define SYSTICK_DELAY_S                2
+#define SYSTICK_DELAY_MS               1000
+#define SYSTICK_DELAY_US               20000
+#define SYSTICK_TASK_DURATION_MS       500
+
+#define SYSTICK_TASK_PRIO              24
+#define SYSTICK_TASK_STACK_SIZE        0x1000
+
+static void *systick_task(const char *arg)
+{
+    unused(arg);
+    uint64_t count_before_get_s;
+    uint64_t count_after_get_s;
+    uint64_t count_before_get_ms;
+    uint64_t count_after_get_ms;
+    uint64_t count_before_get_us;
+    uint64_t count_after_get_us;
+
+    /* SYSTICK init. */
+    uapi_systick_init();
+
+    while (1) {
+        osal_msleep(SYSTICK_TASK_DURATION_MS);
+        osal_printk("systick delay %ds!\r\n", SYSTICK_DELAY_S);
+        count_before_get_s = uapi_systick_get_s();
+        uapi_systick_delay_s(SYSTICK_DELAY_S);
+        count_after_get_s = uapi_systick_get_s();
+        osal_printk("count_after_get_s = %llu, count_before_get_s = %llu\r\n", count_after_get_s, count_before_get_s);
+        osal_printk("count_s = %llu\r\n", count_after_get_s - count_before_get_s);
+        if (count_after_get_s > count_before_get_s) {
+            osal_printk("systick get s work normall.\r\n");
+        }
+
+        osal_printk("systick delay %dms!\r\n", SYSTICK_DELAY_MS);
+        count_before_get_ms = uapi_systick_get_ms();
+        uapi_systick_delay_ms(SYSTICK_DELAY_MS);
+        count_after_get_ms = uapi_systick_get_ms();
+        osal_printk("count_after_get_ms = %llu, count_before_get_ms = %llu\r\n", count_after_get_ms,
+                    count_before_get_ms);
+        osal_printk("count_ms = %llu\r\n", count_after_get_ms - count_before_get_ms);
+        if (count_after_get_ms > count_before_get_ms) {
+            osal_printk("systick get ms work normall.\r\n");
+        }
+
+        osal_printk("systick delay %dus!\r\n", SYSTICK_DELAY_US);
+        count_before_get_us = uapi_systick_get_us();
+        uapi_systick_delay_us(SYSTICK_DELAY_US);
+        count_after_get_us = uapi_systick_get_us();
+        osal_printk("count_after_get_us = %llu, count_before_get_us = %llu\r\n", count_after_get_us,
+                    count_before_get_us);
+        osal_printk("count_us = %llu\r\n", count_after_get_us - count_before_get_us);
+        if (count_after_get_us > count_before_get_us) {
+            osal_printk("systick get us work normall.\r\n");
+        }
+    }
+
+    return NULL;
+}
+
+static void systick_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)systick_task, 0, "SystickTask", SYSTICK_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, SYSTICK_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the systick_entry. */
+app_run(systick_entry);
--- a/application/samples/peripheral/tasks/CMakeLists.txt
+++ b/application/samples/peripheral/tasks/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/tasks.c" PARENT_SCOPE)
--- a/application/samples/peripheral/tasks/tasks.c
+++ b/application/samples/peripheral/tasks/tasks.c
@ -0,0 +1,43 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: Tasks Sample Source. \n
+ *
+ * History: \n
+ * 2023-04-03, Create file. \n
+ */
+#include "common_def.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define TASKS_TEST_DURATION_MS        5000
+#define TASKS_TEST_TASK_PRIO          24
+#define TASKS_TEST_TASK_STACK_SIZE    0x1000
+
+static void *tasks_test_task(const char *arg)
+{
+    unused(arg);
+
+    while (1) {
+        osal_msleep(TASKS_TEST_DURATION_MS);
+        osal_printk("Hello BS25, Now you can develop SLE Product!\r\n");
+    }
+
+    return NULL;
+}
+
+static void tasks_test_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)tasks_test_task, 0, "TasksTask",
+                                      TASKS_TEST_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, TASKS_TEST_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the tasks_test_entry. */
+app_run(tasks_test_entry);
--- a/application/samples/peripheral/tasks/tasks.code-workspace
+++ b/application/samples/peripheral/tasks/tasks.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/tasks"
+	}
+}
--- a/application/samples/peripheral/tcxo/CMakeLists.txt
+++ b/application/samples/peripheral/tcxo/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/tcxo_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/tcxo/tcxo.code-workspace
+++ b/application/samples/peripheral/tcxo/tcxo.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/tcxo"
+	}
+}
--- a/application/samples/peripheral/tcxo/tcxo_demo.c
+++ b/application/samples/peripheral/tcxo/tcxo_demo.c
@ -0,0 +1,73 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: TCXO Sample Source. \n
+ *
+ * History: \n
+ * 2023-07-17, Create file. \n
+ */
+#include "tcxo.h"
+#include "common_def.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define TCXO_DELAY_MS             1000
+#define TCXO_DELAY_US             20000
+#define TCXO_TASK_DURATION_MS     500
+
+#define TCXO_TASK_PRIO            24
+#define TCXO_TASK_STACK_SIZE      0x1000
+
+static void *tcxo_task(const char *arg)
+{
+    unused(arg);
+    uint64_t count_before_get_ms;
+    uint64_t count_after_get_ms;
+    uint64_t count_before_get_us;
+    uint64_t count_after_get_us;
+
+    /* TCXO init. */
+    uapi_tcxo_init();
+
+    while (1) {
+        osal_msleep(TCXO_TASK_DURATION_MS);
+        osal_printk("tcxo delay %dms!\r\n", TCXO_DELAY_MS);
+        count_before_get_ms = uapi_tcxo_get_ms();
+        uapi_tcxo_delay_ms(TCXO_DELAY_MS);
+        count_after_get_ms = uapi_tcxo_get_ms();
+        osal_printk("count_after_get_ms = %llu, count_before_get_ms = %llu\r\n", count_after_get_ms,
+                    count_before_get_ms);
+        osal_printk("count_ms = %llu\r\n", count_after_get_ms - count_before_get_ms);
+        if (count_after_get_ms > count_before_get_ms) {
+            osal_printk("tcxo get ms work normall.\r\n");
+        }
+
+        osal_printk("tcxo delay %dus!\r\n", TCXO_DELAY_US);
+        count_before_get_us = uapi_tcxo_get_us();
+        uapi_tcxo_delay_us(TCXO_DELAY_US);
+        count_after_get_us = uapi_tcxo_get_us();
+        osal_printk("count_after_get_us = %llu, count_before_get_us = %llu\r\n", count_after_get_us,
+                    count_before_get_us);
+        osal_printk("count_us = %llu\r\n", count_after_get_us - count_before_get_us);
+        if (count_after_get_us > count_before_get_us) {
+            osal_printk("tcxo get us work normall.\r\n");
+        }
+    }
+
+    return NULL;
+}
+
+static void tcxo_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)tcxo_task, 0, "TcxoTask", TCXO_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, TCXO_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the tcxo_entry. */
+app_run(tcxo_entry);
--- a/application/samples/peripheral/timer/CMakeLists.txt
+++ b/application/samples/peripheral/timer/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/timer_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/timer/Kconfig
+++ b/application/samples/peripheral/timer/Kconfig
@ -0,0 +1,4 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
--- a/application/samples/peripheral/timer/timer.code-workspace
+++ b/application/samples/peripheral/timer/timer.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/timer"
+	}
+}
--- a/application/samples/peripheral/timer/timer_demo.c
+++ b/application/samples/peripheral/timer/timer_demo.c
@ -0,0 +1,91 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: Timer Sample Source. \n
+ *
+ * History: \n
+ * 2023-07-18, Create file. \n
+ */
+#include "timer.h"
+#include "tcxo.h"
+#include "chip_core_irq.h"
+#include "common_def.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define TIMER_TIMERS_NUM            4
+#define TIMER_INDEX                 1
+#define TIMER_PRIO                  1
+#define TIMER_DELAY_INT             5
+#define TIMER1_DELAY_1000US         1000
+#define TIMER2_DELAY_2000US         2000
+#define TIMER3_DELAY_3000US         3000
+#define TIMER4_DELAY_4000US         4000
+#define TIMER_MS_2_US               1000
+
+#define TIMER_TASK_PRIO             24
+#define TIMER_TASK_STACK_SIZE       0x1000
+
+typedef struct timer_info {
+    uint32_t start_time;
+    uint32_t end_time;
+    uint32_t delay_time;
+} timer_info_t;
+
+static uint32_t g_timer_int_count = 0;
+static timer_info_t g_timers_info[TIMER_TIMERS_NUM] = {
+    {0, 0, TIMER1_DELAY_1000US},
+    {0, 0, TIMER2_DELAY_2000US},
+    {0, 0, TIMER3_DELAY_3000US},
+    {0, 0, TIMER4_DELAY_4000US}
+};
+
+/* Timed task callback function list. */
+static void timer_timeout_callback(uintptr_t data)
+{
+    uint32_t timer_index = (uint32_t)data;
+    g_timers_info[timer_index].end_time = uapi_tcxo_get_ms();
+    g_timer_int_count++;
+}
+
+static void *timer_task(const char *arg)
+{
+    unused(arg);
+    timer_handle_t timer_index[TIMER_TIMERS_NUM] = { 0 };
+    uapi_timer_init();
+    uapi_timer_adapter(TIMER_INDEX, TIMER_1_IRQN, TIMER_PRIO);
+
+    for (uint32_t i = 0; i < TIMER_TIMERS_NUM; i++) {
+        uapi_timer_create(TIMER_INDEX, &timer_index[i]);
+        g_timers_info[i].start_time = uapi_tcxo_get_ms();
+        uapi_timer_start(timer_index[i], g_timers_info[i].delay_time, timer_timeout_callback, i);
+        osal_msleep(TIMER_DELAY_INT);
+    }
+
+    while (g_timer_int_count < TIMER_TIMERS_NUM) {
+        osal_msleep(TIMER_DELAY_INT);
+    }
+
+    for (uint32_t i = 0; i < TIMER_TIMERS_NUM; i++) {
+        uapi_timer_stop(timer_index[i]);
+        uapi_timer_delete(timer_index[i]);
+        osal_printk("real time[%d] = %dms  ", i, (g_timers_info[i].end_time -  g_timers_info[i].start_time));
+        osal_printk("  delay = %dms\r\n", g_timers_info[i].delay_time / TIMER_MS_2_US);
+    }
+    return NULL;
+}
+
+static void timer_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)timer_task, 0, "TimerTask", TIMER_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, TIMER_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the timer_entry. */
+app_run(timer_entry);
--- a/application/samples/peripheral/uart/CMakeLists.txt
+++ b/application/samples/peripheral/uart/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/uart_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/uart/Kconfig
+++ b/application/samples/peripheral/uart/Kconfig
@ -0,0 +1,45 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config UART_BUS_ID
+    int
+    prompt "Choose UART bus id."
+    depends on SAMPLE_SUPPORT_UART
+    default 1
+
+config UART_TXD_PIN
+    int
+    prompt "Choose UART TXD pin."
+    depends on SAMPLE_SUPPORT_UART
+    default 17
+
+config UART_RXD_PIN
+    int
+    prompt "Choose UART RXD pin."
+    depends on SAMPLE_SUPPORT_UART
+    default 18
+
+config UART_TXD_PIN_MODE
+    int
+    prompt "Choose UART TXD pin mode."
+    depends on SAMPLE_SUPPORT_UART
+    default 25
+
+config UART_RXD_PIN_MODE
+    int
+    prompt "Choose UART RXD pin mode."
+    depends on SAMPLE_SUPPORT_UART
+    default 24
+
+config UART_SUPPORT_INT_MODE
+    bool
+    prompt "UART support interrupt mode."
+    depends on SAMPLE_SUPPORT_UART
+    default n
+
+config UART_TRANSFER_SIZE
+    int
+    prompt "Config UART transfer size."
+    depends on SAMPLE_SUPPORT_UART
+    default 64
--- a/application/samples/peripheral/uart/uart.code-workspace
+++ b/application/samples/peripheral/uart/uart.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/uart"
+	}
+}
--- a/application/samples/peripheral/uart/uart_demo.c
+++ b/application/samples/peripheral/uart/uart_demo.c
@ -0,0 +1,197 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: UART Sample Source. \n
+ *
+ * History: \n
+ * 2023-06-29, Create file. \n
+ */
+#include "pinctrl.h"
+#include "uart.h"
+#include "watchdog.h"
+#include "soc_osal.h"
+#include "app_init.h"
+#if defined(CONFIG_UART_SUPPORT_DMA)
+#include "dma.h"
+#include "hal_dma.h"
+#endif
+
+#define UART_BAUDRATE                      115200
+#define CONFIG_UART_INT_WAIT_MS            5
+
+#define UART_TASK_PRIO                     24
+#define UART_TASK_STACK_SIZE               0x1000
+
+static uint8_t g_app_uart_rx_buff[CONFIG_UART_TRANSFER_SIZE] = { 0 };
+#if defined(CONFIG_UART_SUPPORT_INT_MODE)
+static uint8_t g_app_uart_int_rx_flag = 0;
+static volatile uint8_t g_app_uart_int_index = 0;
+static uint8_t g_app_uart_int_rx_buff[CONFIG_UART_TRANSFER_SIZE] = { 0 };
+#endif
+static uart_buffer_config_t g_app_uart_buffer_config = {
+    .rx_buffer = g_app_uart_rx_buff,
+    .rx_buffer_size = CONFIG_UART_TRANSFER_SIZE
+};
+
+#if defined(CONFIG_UART_SUPPORT_DMA)
+uart_write_dma_config_t g_app_dma_cfg = {
+    .src_width = HAL_DMA_TRANSFER_WIDTH_8,
+    .dest_width = HAL_DMA_TRANSFER_WIDTH_8,
+    .burst_length = HAL_DMA_BURST_TRANSACTION_LENGTH_1,
+    .priority = HAL_DMA_CH_PRIORITY_0
+};
+#endif
+
+static void app_uart_init_pin(void)
+{
+#if defined(CONFIG_PINCTRL_SUPPORT_IE)
+    uapi_pin_set_ie(CONFIG_UART_RXD_PIN, PIN_IE_1);
+#endif /* CONFIG_PINCTRL_SUPPORT_IE */
+    uapi_pin_set_mode(CONFIG_UART_TXD_PIN, CONFIG_UART_TXD_PIN_MODE);
+    uapi_pin_set_mode(CONFIG_UART_RXD_PIN, CONFIG_UART_RXD_PIN_MODE);
+}
+
+static void app_uart_init_config(void)
+{
+    uart_attr_t attr = {
+        .baud_rate = UART_BAUDRATE,
+        .data_bits = UART_DATA_BIT_8,
+        .stop_bits = UART_STOP_BIT_1,
+        .parity = UART_PARITY_NONE
+    };
+
+    uart_pin_config_t pin_config = {
+        .tx_pin = CONFIG_UART_TXD_PIN,
+        .rx_pin = CONFIG_UART_RXD_PIN,
+        .cts_pin = PIN_NONE,
+        .rts_pin = PIN_NONE
+    };
+
+#if defined(CONFIG_UART_SUPPORT_DMA)
+    uart_extra_attr_t extra_attr = {
+        .tx_dma_enable = true,
+        .tx_int_threshold = UART_FIFO_INT_TX_LEVEL_EQ_0_CHARACTER,
+        .rx_dma_enable = true,
+        .rx_int_threshold = UART_FIFO_INT_RX_LEVEL_1_CHARACTER
+    };
+    uapi_dma_init();
+    uapi_dma_open();
+    uapi_uart_deinit(CONFIG_UART_BUS_ID);
+    uapi_uart_init(CONFIG_UART_BUS_ID, &pin_config, &attr, &extra_attr, &g_app_uart_buffer_config);
+#else
+    uapi_uart_deinit(CONFIG_UART_BUS_ID);
+    uapi_uart_init(CONFIG_UART_BUS_ID, &pin_config, &attr, NULL, &g_app_uart_buffer_config);
+#endif
+}
+
+#if defined(CONFIG_UART_SUPPORT_INT_MODE)
+static void app_uart_read_int_handler(const void *buffer, uint16_t length, bool error)
+{
+    unused(error);
+    if (buffer == NULL || length == 0) {
+        osal_printk("uart%d int mode transfer illegal data!\r\n", CONFIG_UART_BUS_ID);
+        return;
+    }
+
+    uint8_t *buff = (uint8_t *)buffer;
+    if (memcpy_s(g_app_uart_rx_buff, length, buff, length) != EOK) {
+        osal_printk("uart%d int mode data copy fail!\r\n", CONFIG_UART_BUS_ID);
+        return;
+    }
+    if (memcpy_s(g_app_uart_int_rx_buff + g_app_uart_int_index, length, g_app_uart_rx_buff, length) != EOK) {
+        g_app_uart_int_index = 0;
+        osal_printk("uart%d int mode data2 copy fail!\r\n", CONFIG_UART_BUS_ID);
+    }
+    g_app_uart_int_index += length;
+    g_app_uart_int_rx_flag = 1;
+}
+
+static void app_uart_write_int_handler(const void *buffer, uint32_t length, const void *params)
+{
+    unused(params);
+    uint8_t *buff = (void *)buffer;
+    for (uint8_t i = 0; i < length; i++) {
+        osal_printk("uart%d write data[%d] = %d\r\n", CONFIG_UART_BUS_ID, i, buff[i]);
+    }
+}
+
+static void app_uart_register_rx_callback(void)
+{
+    osal_printk("uart%d int mode register receive callback start!\r\n", CONFIG_UART_BUS_ID);
+    if (uapi_uart_register_rx_callback(CONFIG_UART_BUS_ID, UART_RX_CONDITION_FULL_OR_SUFFICIENT_DATA_OR_IDLE,
+                                       1, app_uart_read_int_handler) == ERRCODE_SUCC) {
+        osal_printk("uart%d int mode register receive callback succ!\r\n", CONFIG_UART_BUS_ID);
+    }
+}
+#endif
+
+static void *uart_task(const char *arg)
+{
+    unused(arg);
+#if defined(CONFIG_UART_SUPPORT_DMA)
+    int32_t ret = CONFIG_UART_TRANSFER_SIZE;
+#if defined(CONFIG_UART_USING_V151)
+    ret = ERRCODE_SUCC;
+#endif
+#endif
+    /* UART pinmux. */
+    app_uart_init_pin();
+
+    /* UART init config. */
+    app_uart_init_config();
+
+#if defined(CONFIG_UART_SUPPORT_INT_MODE)
+    app_uart_register_rx_callback();
+#endif
+
+    while (1) {
+#if defined(CONFIG_UART_SUPPORT_INT_MODE)
+        while (g_app_uart_int_rx_flag != 1) { osal_msleep(CONFIG_UART_INT_WAIT_MS); }
+        g_app_uart_int_rx_flag = 0;
+        osal_printk("uart%d int mode send back!\r\n", CONFIG_UART_BUS_ID);
+        if (uapi_uart_write_int(CONFIG_UART_BUS_ID, g_app_uart_int_rx_buff, CONFIG_UART_TRANSFER_SIZE, 0,
+                                app_uart_write_int_handler) == ERRCODE_SUCC) {
+            osal_printk("uart%d int mode send back succ!\r\n", CONFIG_UART_BUS_ID);
+        }
+#elif defined(CONFIG_UART_SUPPORT_DMA)
+        osal_printk("uart%d dma mode receive start!\r\n", CONFIG_UART_BUS_ID);
+        if (uapi_uart_read_by_dma(CONFIG_UART_BUS_ID, g_app_uart_rx_buff, CONFIG_UART_TRANSFER_SIZE,
+            &g_app_dma_cfg) == ret) {
+            osal_printk("uart%d dma mode receive succ!\r\n", CONFIG_UART_BUS_ID);
+        }
+        osal_printk("uart%d dma mode send back!\r\n", CONFIG_UART_BUS_ID);
+        if (uapi_uart_write_by_dma(CONFIG_UART_BUS_ID, g_app_uart_rx_buff, CONFIG_UART_TRANSFER_SIZE,
+            &g_app_dma_cfg) == ret) {
+            osal_printk("uart%d dma mode send back succ!\r\n", CONFIG_UART_BUS_ID);
+        }
+#else
+        osal_printk("uart%d poll mode receive start!\r\n", CONFIG_UART_BUS_ID);
+        (void)uapi_watchdog_kick();
+        if (uapi_uart_read(CONFIG_UART_BUS_ID, g_app_uart_rx_buff, CONFIG_UART_TRANSFER_SIZE,
+            0) == CONFIG_UART_TRANSFER_SIZE) {
+            osal_printk("uart%d poll mode receive succ!\r\n", CONFIG_UART_BUS_ID);
+        }
+        osal_printk("uart%d poll mode send back!\r\n", CONFIG_UART_BUS_ID);
+        if (uapi_uart_write(CONFIG_UART_BUS_ID, g_app_uart_rx_buff, CONFIG_UART_TRANSFER_SIZE,
+            0) == CONFIG_UART_TRANSFER_SIZE) {
+            osal_printk("uart%d poll mode send back succ!\r\n", CONFIG_UART_BUS_ID);
+        }
+#endif
+    }
+
+    return NULL;
+}
+
+static void uart_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)uart_task, 0, "UartTask", UART_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, UART_TASK_PRIO);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the uart_entry. */
+app_run(uart_entry);
--- a/application/samples/peripheral/uflash/CMakeLists.txt
+++ b/application/samples/peripheral/uflash/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/hfuflash_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/uflash/hfuflash_demo.c
+++ b/application/samples/peripheral/uflash/hfuflash_demo.c
@ -0,0 +1,94 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: WDT Sample Source. \n
+ *
+ * History: \n
+ * 2023-06-29, Create file. \n
+ */
+#include "hsf.h"
+#define UFLASH_TASK_STACK_SIZE       0x1000
+USER_FUNC int test_uflash_one_page(uint32_t addr)
+{
+	static char test_data[4096];
+	int i;
+	
+	hfuflash_erase_page(addr,1);
+	memset(test_data, 0, sizeof(test_data));
+	hfuflash_read(addr,test_data,4096);
+	for(i=0;i<4096;i++)
+	{
+		if(test_data[i]!=0xFF)
+			return 1;
+	}
+
+	memset(test_data,0x55,4096);
+	hfuflash_write(addr,test_data,4096);
+	memset(test_data, 0, sizeof(test_data));
+	hfuflash_read(addr,test_data,4096);
+	for(i=0;i<4096;i++)
+	{
+		if(test_data[i]!=0x55)
+			return 2;
+	}
+
+	memset(test_data,0xAA,4096);
+	hfuflash_erase_page(addr,1);
+	hfuflash_write(addr,test_data,4096);
+	memset(test_data, 0, sizeof(test_data));
+	hfuflash_read(addr,test_data,4096);
+	for(i=0;i<4096;i++)
+	{
+		if(test_data[i]!=0xAA)
+			return 3;
+	}
+	return 0;
+}  
+
+USER_FUNC int test_uflash(void)
+{
+	uint32_t addr = 0;
+	for(addr=0; addr<hfuflash_size(); addr+=4096)
+	{
+		if(test_uflash_one_page(addr))
+		{
+			u_printf("addr = 0x%x failed\r\n", addr);   
+			return 1;
+		}
+	}
+	
+	return 0;
+}   
+
+static void *uflash_task(const char *arg)
+{
+    UNUSED(arg);
+	int i, fail_times = 0;
+	u_printf("\r\n****************************************************\r\n");
+	u_printf("  TIMES       OK          FAIL  \r\n\r\n");
+	for(i=0; i<1000; i++)
+	{
+		if(test_uflash() != 0)
+		{
+			fail_times++;
+		}
+		u_printf("\r  %05d      %05d        %05d", i+1, i+1-fail_times, fail_times);   
+	}
+    
+    return NULL;
+}
+
+static void hfuflash_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)uflash_task, 0, "uflashTask", UFLASH_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, WDT_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the watchdog_entry. */
+app_run(hfuflash_entry);
--- a/application/samples/peripheral/watchdog/CMakeLists.txt
+++ b/application/samples/peripheral/watchdog/CMakeLists.txt
@ -0,0 +1,5 @@
+#===============================================================================
+# @brief    cmake file
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+set(SOURCES "${SOURCES}" "${CMAKE_CURRENT_SOURCE_DIR}/watchdog_demo.c" PARENT_SCOPE)
--- a/application/samples/peripheral/watchdog/Kconfig
+++ b/application/samples/peripheral/watchdog/Kconfig
@ -0,0 +1,15 @@
+#===============================================================================
+# @brief    Kconfig file.
+# Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+#===============================================================================
+config WDT_TIMEOUT_SAMPLE
+    bool
+    prompt "Choose watchdog kick timeout."
+    depends on SAMPLE_SUPPORT_WDT
+    default n
+
+config WDT_KICK_SAMPLE
+    bool
+    prompt "Choose watchdog kick normally."
+    depends on SAMPLE_SUPPORT_WDT
+    default n
--- a/application/samples/peripheral/watchdog/watchdog.code-workspace
+++ b/application/samples/peripheral/watchdog/watchdog.code-workspace
@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../../../"
+		}
+	],
+	"settings": {
+		"debug.onTaskErrors": "debugAnyway",
+		"workspace.samplePath": "./samples/peripheral/watchdog"
+	}
+}
--- a/application/samples/peripheral/watchdog/watchdog_demo.c
+++ b/application/samples/peripheral/watchdog/watchdog_demo.c
@ -0,0 +1,69 @@
+/**
+ * Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
+ *
+ * Description: WDT Sample Source. \n
+ *
+ * History: \n
+ * 2023-06-29, Create file. \n
+ */
+#include "pinctrl.h"
+#include "watchdog.h"
+#include "soc_osal.h"
+#include "app_init.h"
+
+#define TIME_OUT                  2
+#define WDT_MODE                  1
+#define TEST_PARAM_KICK_TIME      10
+#define WDT_TASK_DURATION_MS      500
+
+#define WDT_TASK_PRIO             24
+#define WDT_TASK_STACK_SIZE       0x1000
+
+static errcode_t watchdog_callback(uintptr_t param)
+{
+    UNUSED(param);
+    osal_printk("watchdog kick timeout!\r\n");
+    return ERRCODE_SUCC;
+}
+
+static void *watchdog_task(const char *arg)
+{
+    UNUSED(arg);
+
+    errcode_t ret = uapi_watchdog_init(TIME_OUT);
+    if (ret == ERRCODE_INVALID_PARAM) {
+        osal_printk("param is error, timeout is %d.\r\n", TIME_OUT);
+        return NULL;
+    }
+    (void)uapi_watchdog_enable((wdt_mode_t)WDT_MODE);
+    (void)uapi_register_watchdog_callback(watchdog_callback);
+    osal_printk("init watchdog\r\n");
+#if defined(CONFIG_WDT_TIMEOUT_SAMPLE)
+    while (1) {};
+#endif
+
+#if defined(CONFIG_WDT_KICK_SAMPLE)
+    while (1) {
+        osal_msleep(WDT_TASK_DURATION_MS);
+        (void)uapi_watchdog_kick();
+        osal_printk("kick success\r\n");
+    }
+#endif
+    (void)uapi_watchdog_deinit();
+    return NULL;
+}
+
+static void watchdog_entry(void)
+{
+    osal_task *task_handle = NULL;
+    osal_kthread_lock();
+    task_handle = osal_kthread_create((osal_kthread_handler)watchdog_task, 0, "WatchdogTask", WDT_TASK_STACK_SIZE);
+    if (task_handle != NULL) {
+        osal_kthread_set_priority(task_handle, WDT_TASK_PRIO);
+        osal_kfree(task_handle);
+    }
+    osal_kthread_unlock();
+}
+
+/* Run the watchdog_entry. */
+app_run(watchdog_entry);