ekko/LPT26x-HSF-4MB-Hilink_14.2.0.308_20250411
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Ekko.bao
2025-05-13 22:00:58 +08:00
commit e4c030b0c0
564 changed files with 78858 additions and 0 deletions
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54
build/config/target_config/ws63/hdb_config/base_datatype_def.txt Executable file
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uint32_t 32 0
uint16_t 16 0
uint8_t 8 0
int32_t 32 1
int16_t 16 1
int8_t 8 1
enum 32 0
HSO_ENUM 32 0
u32 32 0
u16 16 0
u8 8 0
s32 32 1
s16 16 1
s8 8 1
BOOL 8 0
TD_U8A 8 0
TD_U16A 16 0
TD_CHARTA 8 1 1
TD_U32 32 0
TD_U16 16 0
TD_U8 8 0
TD_S32 32 1
TD_S16 16 1
TD_S8 8 1
TD_BOOL 8 0
TD_CHAR 8 1 1
char 8 1 1
long 32 1
TD_PVOID 32 0
TD_PBYTE 32 0
td_u32 32 0
td_u16 16 0
td_u8 8 0
td_s32 32 1
td_s16 16 1
td_s8 8 1
td_bool 8 0
td_char 8 1 1
td_pvoid 32 0
td_pbyte 32 0
uintptr_t 32 0
td_u64 64 0
td_uintptr_t 32 0
td_void 32 0

42
build/config/target_config/ws63/hdb_config/database_cfg/OTA_MSG_List.txt Executable file
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//<2F><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>BFGN<47>Ϸ<EFBFBD>MsgID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD>ñ<EFBFBD><C3B1>ļ<EFBFBD><C4BC><EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//<2F><>//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD>ͷ<EFBFBD><CDB7>ţ<EFBFBD><C5A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ڶ<EFBFBD><DAB6><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD>Ŀ<EFBFBD>ʼ<EFBFBD><CABC>ĩβ<C4A9><CEB2><EFBFBD><EFBFBD>[*** START][*** END]
//<2F><>Ӧ<EFBFBD><D3A6><EFBFBD>ĸ<EFBFBD>ʽΪǰ<CEAA><C7B0>ΪMsgID<49><44>Ȼ<EFBFBD><C8BB>һ<EFBFBD><D2BB>Tabλ<62><CEBB>Ȼ<EFBFBD><C8BB><EFBFBD><EFBFBD>Ӧ<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>
//<2F><>ע<EFBFBD><D7A2><EFBFBD>Լ<EFBFBD>MsgID<49><44>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD>ʲôģ<C3B4><C4A3>ʹ<EFBFBD>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>ά<EFBFBD><CEAC>
//<2F><><EFBFBD><EFBFBD>
//BFGN OTA
//[BFGN OTA START]
//0x2000 abc
//0x2001 efg
//[BFGN OTA END]
//BT OTA
[BT OTA START]
0x1000 OTA_BT_LMP_NAME_REQ
0x1001 OTA_BT_LMP_NAME_RES
0x1002 OTA_BT_LMP_FEATURE_REQ
0x1003 OTA_BT_LMP_FEATURE_RES
0x1004 OTA_BT_LMP_PDU_TX
0x1005 OTA_BT_LMP_PDU_RX
0x1006 OTA_BT_RW_CS_STRU
0x1007 OTA_BT_EX_TAB
0x1008 OTA_BT_KE_QUEUE
0x1009 OTA_BT_KE_QUEUE
0x100A OTA_BT_LD_ENV_STRU
0x100B OTA_BT_RWBT_ENV_STRU
0x100C OTA_BT_AFH_CHNL_STAT
0x100D OTA_BT_ACL_RX_LINK_STAT
0x100E OTA_BT_SCO_STAT
0x100F OTA_BT_RSSI_STAT
0x1010 OTA_BT_ACL_TX_STAT
0x1011 OTA_BT_SLEEP_STAT
0x1012 OTA_BT_GET_BT_EXT_CS
0x1013 OTA_BT_GET_BLE_EXT_CS
0x1014 OTA_BT_READ_BT_REG
0x1015 OTA_BT_READ_BLE_REG
0x1016 OTA_BT_CHNLSCAN_REPORT
0x1017 OTA_BT_CHNLSCAN_DATA
0x1018 OTA_BT_CHNLSCAN_RSSI
0x1019 OTA_BT_CHNLSCAN_DUTYCYCYLE
0x101A OTA_BT_READ_DATA
0x101B OTA_EA_ELT_TAG
[BT OTA END]

2033
build/config/target_config/ws63/hdb_config/database_cfg/STATUS_CommandList.txt Executable file
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0
build/config/target_config/ws63/hdb_config/database_cfg/ext_dfx_include.cfg Executable file
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38
build/config/target_config/ws63/hdb_config/database_cfg/mk_hdb_xml.json Executable file
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{
"OUT_DIR" : "output/ws63",
"BUILD_TEMP_PATH" : "output/ws63/build_hso_cfg",
"DATABASE_VERSION":"",
"DATABASE_VERSION_CORE":"acore",
"DATABASE_BASE" : "build/config/target_config/ws63/hdb_config/database_template",
"DATABASE_DEFAULT_CFG_PATH" : "",
"DATABASE_EXTERN_CFG_PATH" : "",
"DATABASE_MSS_PRIM_PATH" : "output/ws63/build_hso_cfg/hdb/hdbcfg/mss_prim_db.xml",
"DATABASE_DIAG_DIR_PATH" : "output/ws63/build_hso_cfg/hdb/struct",
"DATABASE_TXT_FILE" : "output/ws63/build_hso_cfg/database.etypes",
"LOG_FILE_NAME":"output/ws63/build_hso_cfg/hso_database/xml/log",
"HDB_XML_TEMP_ROOT_DIR":"output/ws63/build_hso_cfg/hso_database/xml",
"HDB_XML_TEMP_BASE_DIR":"output/ws63/build_hso_cfg/hso_database/xml/base",
"HDB_PRIM_XML_DST_FILE" : "output/ws63/build_hso_cfg/hdb/hdbcfg/mss_prim_db.xml",
"HDB_PRIM_XML_SRC_FILE" : "build/config/target_config/ws63/hdb_config/database_template/acore/system/hdbcfg/mss_prim_db.xml",
"HDB_CMD_XML_DST_FILE" : "output/ws63/build_hso_cfg/hdb/hdbcfg/mss_cmd_db.xml",
"HDB_CMD_XML_SRC_FILE" : "build/config/target_config/ws63/hdb_config/database_template/acore/system/hdbcfg/mss_cmd_db.xml",
"HDB_PRIM_XML_FILE_ID_BIT" : "14",
"HDB_PRIM_XML_LINE_ID_BIT" : "14",
"HDB_PRIM_XML_PRINT_LEVEL_BIT" : "4",
"HDB_TXT_TEMP_DIR":"output/ws63/build_hso_cfg/hso_database/txt",
"HDB_TXT_BASE_DATATYPE":"build/config/target_config/ws63/hdb_config/base_datatype_def.txt",
"HDB_TXT_DST_DIR":"output/ws63/build_hso_cfg/hdb/struct",
"HDB_TXT_SRC_DIR":"build/config/target_config/ws63/hdb_config/database_template/acore/system/diag",
"HDB_XML_PRE_GENERATED_CORE":["closed_comp"],
"HDB_XML_PRE_GENERATED_DIR":["interim_binary/ws63/acore/build_hso_cfg"],
"BT_STATUS_DIR":"build/config/target_config/ws63/hdb_config/database_cfg",
"OTA_MSG_DIR":"build/config/target_config/ws63/hdb_config/database_cfg"
}

629
build/config/target_config/ws63/hdb_config/database_template/acore/system/diag/apps_core_hso_msg_struct_def.txt Executable file
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#include "base_datatype_def.txt"
typedef struct {
td_char name[32];
td_u32 id;
td_u16 status;
td_u16 priority;
td_pvoid task_sem;
td_pvoid task_mutex;
td_u32 event_stru[3];
td_u32 event_mask;
td_u32 stack_size;
td_u32 top_of_stack;
td_u32 bottom_of_stack;
td_u32 sp;
td_u32 curr_used;
td_u32 peak_used;
td_u32 overflow_flag;
} ext_task_info;
typedef struct {
td_u16 task_prio;
td_u32 stack_size;
td_u32 task_policy;
td_u32 task_nice;
td_u32 task_cpuid;
td_char *task_name;
td_void *resved;
} ext_task_attr;
ext_errno uapi_task_create(td_u32 *taskid, const ext_task_attr *attr,
td_void *(*task_route)(td_void *), td_void *arg);
ext_errno uapi_task_delete(td_u32 taskid);
ext_errno uapi_task_suspend(td_u32 taskid);
ext_errno uapi_task_resume(td_u32 taskid);
ext_errno uapi_task_get_priority(td_u32 taskid, td_u32 *priority);
ext_errno uapi_task_set_priority(td_u32 taskid, td_u32 priority);
td_u32 uapi_task_get_current_id(td_void);
td_void uapi_task_lock(td_void);
td_void uapi_task_unlock(td_void);
td_bool uapi_task_is_lock(td_void);
ext_errno uapi_sleep(td_u32 ms);
typedef struct {
td_u32 total;
td_u32 used;
td_u32 free;
td_u32 free_node_num;
td_u32 used_node_num;
td_u32 max_free_node_size;
td_u32 malloc_fail_count;
td_u32 peek_size;
} ext_mdm_mem_info;
typedef struct {
td_u32 pool_addr;
td_u32 pool_size;
td_u32 fail_count;
td_u32 cur_use_size;
td_u32 peek_size;
} ext_mem_pool_crash_info;
td_pvoid uapi_malloc(td_u32 size);
td_void uapi_free(const td_pvoid addr);
TD_CONST ext_mem_pool_crash_info *uapi_mem_get_sys_info_crash(td_void);
ext_errno uapi_pool_mem_init(td_void *pool, td_u32 size);
td_void *uapi_pool_mem_alloc(td_void *pool, td_ulong size);
td_void uapi_pool_mem_free(td_void *pool, TD_CONST td_void *addr);
ext_errno uapi_pool_mem_deinit(td_void *pool);
typedef enum {
EXCEPTION_PHASE_INITIALIZATION,
EXCEPTION_PHASE_TASK,
EXCEPTION_PHASE_INTERRUPT,
EXCEPTION_PHASE_MAX_TYPE
} ext_exception_phase_type;
typedef struct {
td_u32 mepc;
td_u32 ra;
td_u32 sp;
} ext_exception_cpu_basic_info;
typedef struct {
td_u32 mcause;
td_u32 mstatus;
td_u32 ccause;
td_u32 mtval;
td_u32 gp;
td_u32 tp;
td_u32 t0;
td_u32 t1;
td_u32 t2;
td_u32 s0;
td_u32 s1;
td_u32 a0;
td_u32 a1;
td_u32 a2;
td_u32 a3;
td_u32 a4;
td_u32 a5;
td_u32 a6;
td_u32 a7;
td_u32 s2;
td_u32 s3;
td_u32 s4;
td_u32 s5;
td_u32 s6;
td_u32 s7;
td_u32 s8;
td_u32 s9;
td_u32 s10;
td_u32 s11;
td_u32 t3;
td_u32 t4;
td_u32 t5;
td_u32 t6;
} ext_exception_cpu_extend_info;
typedef struct {
td_u32 event_type;
td_u32 task;
td_u64 time;
td_uintptr_t identity;
td_uintptr_t params[2];
} ext_exception_track_info;
typedef struct {
ext_exception_cpu_basic_info basic_info;
ext_exception_cpu_extend_info extend_info;
} ext_exception_cpu_register;
typedef struct {
td_u16 is_irq;
td_u16 type;
td_u32 faultaddr;
td_u32 thrdpid;
td_u32 stack_top;
td_u32 stack_bottom;
} ext_exception_schedule_info;
typedef struct {
ext_exception_cpu_register exc_cpu_context;
ext_exception_schedule_info schedule_info;
} ext_exception_context;
typedef enum {
CORES_APPLICATION_CORE = 0,
CORES_PROTOCOL_CORE,
CORES_SECURITY_CORE,
CORES_DSP_CORE,
CORES_CGRA_CORE,
CORES_IOMCU_CORE,
CORES_MAX_NUMBER_PHYSICAL,
CORES_UNKNOWN,
} cores;
typedef enum {
EXT_SYSERR_NO_USED = 0,
EXT_SYSERR_WATCH_DOG = 1,
EXT_SYSERR_OLD_PANIC,
EXT_SYSERR_LOS_PANIC,
EXT_SYSERR_CPU_EXEC,
EXT_SYSERR_OS_ERR,
EXT_SYSERR_MAX_MAIN_TYPE
} ext_syserr_main_type;
typedef enum {
SYSERR_QUERY_SPECIFY_BLOCK_ID0,
SYSERR_QUERY_SPECIFY_BLOCK_ID1,
SYSERR_QUERY_SPECIFY_BLOCK_ID2,
SYSERR_QUERY_SPECIFY_BLOCK_ID3,
SYSERR_QUERY_SPECIFY_BLOCK_ID4,
SYSERR_QUERY_SPECIFY_BLOCK_ID5,
SYSERR_QUERY_SPECIFY_BLOCK_ID6,
SYSERR_QUERY_SPECIFY_BLOCK_ID7,
SYSERR_QUERY_SPECIFY_BLOCK_MAX_TYPE,
SYSERR_LASTEST_STORED_BLOCK,
SYSERR_NEW_STORE_BLOCK,
SYSERR_BLOCK_MAX_TYPE,
} syserr_info_type;
typedef struct {
td_u8 core[1];
} dbk_str_type;
typedef struct {
td_u32 head_magic;
td_bool save_ind;
td_u8 core;
td_u16 structure_ver;
td_u32 size;
} ext_syserr_head_info;
typedef struct {
td_u16 main_type;
td_u16 pad;
td_u32 sub_type;
ext_exception_cpu_basic_info cpu_context;
} ext_syserr_basic_context_info;
typedef struct {
td_u8 is_isr;
td_u8 pad[3];
td_u32 id;
td_u32 top;
td_u32 bottom;
td_u32 revised_top;
td_u32 revised_bottom;
td_u32 revised_sp;
} ext_syserr_base_stack_info;
typedef struct {
ext_syserr_basic_context_info basic_context[2];
ext_syserr_base_stack_info basic_stack[2];
td_u32 trace[40];
} ext_syserr_lite_info;
typedef struct {
td_u32 crash_sec;
td_u32 soft_version;
td_u8 loop;
td_u8 last_trap_level;
td_u16 process_map;
td_u32 data[5];
} ext_syserr_crash_scene;
typedef struct {
ext_exception_cpu_extend_info cpu_register;
} ext_syserr_cpu_extend_register;
typedef struct {
ext_mem_pool_crash_info mem;
} ext_syserr_mem_info;
typedef struct {
td_u32 peek;
td_u32 top_content;
td_u32 stack[0x10];
td_char name[32];
} ext_syserr_extend_stack_info;
typedef struct {
td_u32 end_magic;
} ext_syserr_tail;
typedef struct {
ext_syserr_head_info head;
ext_syserr_crash_scene scene;
ext_syserr_lite_info lite_info;
ext_syserr_cpu_extend_register cpu;
ext_syserr_mem_info mem;
ext_syserr_extend_stack_info stack;
ext_syserr_tail tail;
} ext_syserr_info;
typedef td_void (*uapi_syserr_hook)(td_u32 main_type, td_u32 sub_type);
td_void uapi_syserr_set_unreboot(td_void);
td_void uapi_syserr_register_hook(uapi_syserr_hook hook);
td_void uapi_syserr_panic(td_u32 reason, td_u32 data0, td_u32 data1, td_u32 data2, td_u32 data3);
td_u32 uapi_syserr_query_crash_info(cores src_core, syserr_info_type type, ext_syserr_info *dest_addr);
typedef unsigned char td_uchar;
typedef unsigned char td_u8;
typedef unsigned short td_u16;
typedef unsigned int td_u32;
typedef unsigned long long td_u64;
typedef unsigned long td_ulong;
typedef char td_char;
typedef signed char td_s8;
typedef short td_s16;
typedef int td_s32;
typedef long long td_s64;
typedef long td_slong;
typedef float td_float;
typedef double td_double;
typedef void td_void;
typedef td_u8 td_bool;
typedef td_u32 td_handle;
typedef td_u8 td_byte;
typedef td_byte* td_pbyte;
typedef void* td_pvoid;
typedef volatile td_u32 td_u32_reg;
typedef unsigned long td_size_t;
typedef signed long td_ssize_t;
typedef unsigned long td_length_t;
typedef unsigned long long td_mem_size_t;
typedef long long td_mem_handle_t;
typedef unsigned int td_fr32;
typedef unsigned int uintptr_t;
typedef uintptr_t td_uintptr_t;
typedef unsigned int td_phys_addr_t;
typedef unsigned int td_virt_addr_t;
typedef unsigned int td_phys_addr_bit32;
typedef struct {
td_u32 case_id;
td_u32 data[3];
}diag_dfx_cmd_req_st;
typedef struct {
td_u32 case_id;
td_u32 data[3];
}diag_dfx_cmd_ind_st;
typedef struct {
td_u32 put_msg_2_cache_fail_times;
td_u32 send_ipc_times;
td_u32 send_used_size;
td_u32 log_receive_times;
td_u32 log_reported_times;
td_u32 send_local_q_fail;
td_u32 record_idx;
td_u32 channel_receive_data_cnt[4];
td_u32 mem_pkt_alloc_size[2];
td_u32 mem_pkt_free_size[2];
} zdiag_dfx_stat;
typedef struct {
td_u32 dir;
td_u32 random_data;
} diag_beat_heart_cmd_ind;
typedef enum {
EXT_UART_IDX_0,
EXT_UART_IDX_1,
EXT_UART_IDX_2,
EXT_UART_IDX_3,
EXT_UART_IDX_LP,
EXT_UART_IDX_MAX,
EXT_UART_IDX_INVALID_ID = 0xFF,
} ext_uart_idx;
typedef enum {
EXT_SPI_ID_0,
EXT_SPI_ID_MAX,
} ext_spi_idx;
typedef enum {
EXT_DMA_PERIPHERAL_MEMORY = 0,
EXT_DMA_PERIPHERAL_UART0_TX = 1,
EXT_DMA_PERIPHERAL_UART0_RX = 2,
EXT_DMA_PERIPHERAL_SSP_TX = 3,
EXT_DMA_PERIPHERAL_SSP_RX = 4,
EXT_DMA_PERIPHERAL_MAX_NUM,
} ext_dma_peripheral;
typedef enum {
EXT_DMA_CHANNEL_NONE = 0xFF,
EXT_DMA_CHANNEL_0 = 0,
EXT_DMA_CHANNEL_1,
EXT_DMA_CHANNEL_2,
EXT_DMA_CHANNEL_3,
EXT_DMA_CHANNEL_MAX_NUM,
} ext_dma_channel;
typedef enum {
EXT_DMA_CH_PRIORITY_HIGHEST = 0,
EXT_DMA_CH_PRIORITY_HIGH_1 = 1,
EXT_DMA_CH_PRIORITY_HIGH_2 = 2,
EXT_DMA_CH_PRIORITY_LOWEST = 3,
EXT_DMA_CH_PRIORITY_MAX
} ext_dma_ch_priority;
typedef enum {
EXT_LP_PWM_PORT_PWM0,
EXT_LP_PWM_PORT_PWM1,
EXT_LP_PWM_PORT_PWM2,
EXT_PWM_PORT_PWM0,
EXT_PWM_PORT_PWM1,
EXT_PWM_PORT_PWM2,
EXT_PWM_PORT_PWM3,
EXT_PWM_PORT_MAX
} ext_pwm_idx;
typedef enum {
EXT_PWM_GROUP_ID_0 = 0,
EXT_PWM_GROUP_ID_1,
EXT_PWM_GROUP_ID_2,
EXT_PWM_GROUP_ID_3,
EXT_PWM_GROUP_ID_4,
EXT_PWM_GROUP_ID_MAX,
} ext_pwm_group_idx;
typedef enum {
EXT_PWM_PORT_ID_0 = 0,
EXT_PWM_PORT_ID_1,
EXT_PWM_PORT_ID_2,
EXT_PWM_PORT_ID_3,
EXT_PWM_PORT_ID_4,
EXT_PWM_PORT_ID_MAX,
} ext_pwm_port_idx;
typedef enum {
EXT_HWTIMER_ID_0,
EXT_HWTIMER_ID_1,
EXT_HWTIMER_ID_2,
EXT_HWTIMER_ID_3,
EXT_HWTIMER_ID_4,
EXT_HWTIMER_ID_5,
EXT_HWTIMER_ID_6,
EXT_HWTIMER_ID_7,
EXT_HWTIMER_ID_MAX,
} ext_hwtimer_id;
typedef enum {
EXT_CLK_IPC = 0,
EXT_CLK_UART0,
EXT_CLK_UART1,
EXT_CLK_UART2,
EXT_CLK_UART3,
EXT_CLK_LP_UART,
EXT_CLK_I2C0,
EXT_CLK_I2C1,
EXT_CLK_I2C2,
EXT_CLK_I2C3,
EXT_CLK_I2C4,
EXT_CLK_SPI0,
EXT_CLK_PWM0,
EXT_CLK_PWM1,
EXT_CLK_AO_PWM,
EXT_CLK_TIMER0,
EXT_CLK_TIMER1,
EXT_CLK_TIMER2,
EXT_CLK_TIMER3,
EXT_CLK_TIMER4,
EXT_CLK_TIMER5,
EXT_CLK_TIMER6,
EXT_CLK_TIMER7,
EXT_CLK_WDT,
EXT_CLK_GPIO,
EXT_CLK_DMA,
EXT_CLK_CPU,
EXT_CLK_TSENSOR,
EXT_CLK_LSADC,
EXT_CLK_ID_MAX,
EXT_CLK_ID_INVALID_ID = 0xFFFFFFFF,
} ext_clk_id;
typedef struct {
td_u32 reg_base_addr;
td_u32 irq_number;
td_u32 channel_max_num;
td_u32 peripheral_max_num;
td_u32 lowest_priority;
} ext_dma_device;
td_void dma_resource_init(td_void);
td_void uart_resource_init(td_void);
td_void ipc_resource_init(td_void);
td_void hrtimer_resource_init(td_void);
td_void hwtimer_resource_init(td_void);
td_void rtc_resource_init(td_void);
td_void rtc_calendar_resource_init(td_void);
td_void i2c_resource_init(td_void);
td_void clk_resource_init(td_void);
td_void io_resource_init(td_void);
td_void pwm_resource_init(td_void);
td_void spi_resource_init(td_void);
td_void watchdog_resource_init(td_void);
td_void tsensor_resource_init(td_void);
td_void share_os_res_resource_init(td_void);
td_void dntc_resource_init(td_void);
typedef enum {
EXT_DMA_POWER_OF_BURST_0 = 0,
EXT_DMA_POWER_OF_BURST_1 = 1,
EXT_DMA_POWER_OF_BURST_2 = 2,
EXT_DMA_POWER_OF_BURST_3 = 3,
EXT_DMA_POWER_OF_BURST_4 = 4,
EXT_DMA_POWER_OF_BURST_5 = 5,
EXT_DMA_POWER_OF_BURST_6 = 6,
EXT_DMA_POWER_OF_BURST_7 = 7,
EXT_DMA_POWER_OF_BURST_8 = 8,
EXT_DMA_POWER_OF_BURST_9 = 9,
EXT_DMA_POWER_OF_BURST_10 = 10,
} ext_dma_power_of_burst;
typedef struct {
ext_dma_power_of_burst power_of_burst;
td_bool use_burst;
td_u8 pad[3];
} ext_dma_peripheral_feature;
typedef td_void (*ext_dma_transfer_peripheral_prepare_callback)(ext_dma_peripheral src, ext_dma_peripheral dst);
typedef td_void (*ext_dma_transfer_peripheral_finish_callback)(ext_dma_peripheral src, ext_dma_peripheral dst);
typedef struct {
ext_dma_peripheral src_periph;
ext_dma_peripheral dst_periph;
ext_dma_peripheral_feature feature;
ext_dma_transfer_peripheral_prepare_callback transfer_prepare;
ext_dma_transfer_peripheral_finish_callback transfer_finish;
} ext_dma_peripheral_config;
typedef enum {
EXT_DMA_DATA_WIDTH_BYTE = 0x0,
EXT_DMA_DATA_WIDTH_HALFWORD = 0x1,
EXT_DMA_DATA_WIDTH_WORD = 0x2,
EXT_DMA_DATA_WIDTH_MAX = 0x3,
} ext_dma_data_width;
typedef enum {
EXT_DMA_CH_TRANSFER_TYPE_MEM_TO_MEM = 0,
EXT_DMA_CH_TRANSFER_TYPE_MEM_TO_PERIPHERAL = 1,
EXT_DMA_CH_TRANSFER_TYPE_PERIPHERAL_TO_MEM = 2,
EXT_DMA_CH_TRANSFER_TYPE_PERIPHERAL_TO_PERIPHERAL = 3,
EXT_DMA_CH_TRANSFER_TYPE_MAX
} ext_dma_ch_transfer_type;
typedef enum {
EXT_DMA_CH_CYCLE_TYPE_SINGLE = 0,
EXT_DMA_CH_CYCLE_TYPE_BATCHED_PART = 1,
EXT_DMA_CH_CYCLE_TYPE_BATCHED_END = 2,
EXT_DMA_CH_CYCLE_TYPE_MAX
} ext_dma_ch_cycle_type;
typedef enum {
EXT_DMA_INTERRUPT_DONE,
EXT_DMA_INTERRUPT_ERR,
EXT_DMA_INTERRUPT_MAX
} ext_dma_interrupt;
typedef td_void (*ext_dma_transfer_callback)(ext_dma_interrupt intr);
typedef struct {
td_u32 src_addr;
td_u32 dst_addr;
td_u16 transfer_num;
ext_dma_data_width data_width;
ext_dma_ch_cycle_type cycle_type;
} ext_dma_ch_user_config;
ext_errno uapi_dma_init(td_void);
td_void uapi_dma_deinit(td_void);
ext_errno uapi_dma_open_ch(ext_dma_channel *ch, ext_dma_ch_priority pri,
const ext_dma_peripheral_config *config);
ext_errno uapi_dma_close_ch(ext_dma_channel ch);
ext_errno uapi_dma_transfer(ext_dma_channel ch, const ext_dma_ch_user_config *user_cfg,
ext_dma_transfer_callback callback, td_bool block);
typedef enum {
EXT_UART_DATA_BIT_5 = 5,
EXT_UART_DATA_BIT_6,
EXT_UART_DATA_BIT_7,
EXT_UART_DATA_BIT_8,
} ext_uart_data_bit;
typedef enum {
EXT_UART_PARITY_NONE,
EXT_UART_PARITY_ODD,
EXT_UART_PARITY_EVEN,
} ext_uart_parity;
typedef enum {
EXT_UART_STOP_BIT_1 = 1,
EXT_UART_STOP_BIT_2,
} ext_uart_stop_bit;
typedef enum {
EXT_UART_FLOW_CTRL_NONE = 0x0,
EXT_UART_FLOW_CTS = 0x1,
EXT_UART_FLOW_RTS = 0x2,
EXT_UART_FLOW_CTRL_RTS_CTS = EXT_UART_FLOW_CTS | EXT_UART_FLOW_RTS,
EXT_UART_FLOW_CTRL_SOFT = 0x4,
} ext_uart_flow_ctrl;
typedef enum {
EXT_UART_ERR_FRAM = 0x1,
EXT_UART_ERR_PARITY = 0x2,
EXT_UART_ERR_BREAK = 0x4,
EXT_UART_ERR_OVER_RUN = 0x8,
} ext_uart_err_type;
typedef struct {
td_u32 baud_rate;
td_u8 data_bits;
td_u8 stop_bits;
td_u8 parity;
td_u8 pad;
} ext_uart_attr;
typedef struct {
td_bool tx_use_dma;
td_u8 tx_dma_ch_priority;
td_u16 rx_buf_size;
td_u16 tx_buf_size;
} ext_uart_extra_attr;
typedef struct {
ext_dma_ch_cycle_type cycle_type;
ext_dma_transfer_callback done_callback;
} ext_uart_write_dma_config;
typedef enum {
EXT_UART_NOTIFY_RX_MASK_IDLE = 0x1,
EXT_UART_NOTIFY_RX_SUFFICIENT_DATA = 0x2,
EXT_UART_NOTIFY_RX_ERR = 0x4,
EXT_UART_NOTIFY_RX_DATA = 0x8,
EXT_UART_NOTIFY_TX_FINISH = 0x10,
EXT_UART_NOTIFY_ALL_MASK = 0x1F,
} ext_uart_rx_hook_type;
typedef td_void(*ext_uart_rx_hook)(ext_uart_rx_hook_type type, td_u16 data);
ext_errno uapi_uart_init(ext_uart_idx id, TD_CONST ext_uart_attr *attr, TD_CONST ext_uart_extra_attr *advance_attr);
ext_errno uapi_uart_set_attr(ext_uart_idx id, ext_uart_attr *attr);
ext_errno uapi_uart_get_attr(ext_uart_idx id, ext_uart_attr *attr);
td_s32 uapi_uart_read(ext_uart_idx id, td_u8 *data, td_u32 len);
td_s32 uapi_uart_write(ext_uart_idx id, TD_CONST td_u8 *data, td_u32 len);
ext_errno uapi_uart_deinit(ext_uart_idx id);
ext_errno uapi_uart_register_rx_callback(ext_uart_idx id,
td_u32 hook_mask,
td_u16 sufficient_cnt,
ext_uart_rx_hook hook);
td_bool uapi_uart_has_pending_transmissions(ext_uart_idx id);
ext_errno uapi_uart_flush_rx_data(ext_uart_idx id);
td_s32 uapi_uart_write_by_dma(ext_uart_idx id, TD_CONST td_u8 *data, td_u16 len, ext_uart_write_dma_config *dma_cfg);
ext_errno uapi_uart_set_flow_ctrl(ext_uart_idx id, ext_uart_flow_ctrl type);
ext_errno uapi_uart_set_software_flow_ctrl_level(ext_uart_idx id, td_u16 lower_water_margin, td_u16 upper_water_margin);
ext_errno uapi_uart_set_tx_timeout(ext_uart_idx id, td_u32 block_ms);
ext_errno uapi_uart_set_rx_timeout(ext_uart_idx id, td_u32 block_ms);
td_s32 uapi_uart_get_rx_data_count(ext_uart_idx id);
typedef struct {
td_u32 offset;
td_u32 size;
} ext_diag_dump_item;
typedef struct {
td_u32 len;
td_char name[128];
td_u32 cnt;
ext_diag_dump_item item[0];
} ext_diag_dump_by_name_cmd;
typedef struct {
td_u32 ret;
td_u32 offset;
td_u32 size;
td_u8 data[0];
} ext_diag_dump_by_name_ind;
typedef enum {
TRANSMIT_STATE_NOTIFY_INVALID_ID = 10,
TRANSMIT_STATE_NOTIFY_FINISH,
TRANSMIT_STATE_NOTIFY_FINISH_2,
TRANSMIT_STATE_NOTIFY_DUPLICATE_ID,
} transmit_state_notify_code;
typedef enum {
TRANSMIT_TYPE_READ_FILE,
TRANSMIT_TYPE_DUMP,
TRANSMIT_TYPE_SAVE_FILE,
} transmit_type;
typedef struct {
td_u32 offset;
td_u32 size;
} transmit_data_request_item;
typedef struct {
td_u32 transmit_id;
td_u32 cnt;
transmit_data_request_item item[0];
} transmit_data_request_pkt;
typedef struct {
td_u32 transmit_id;
td_u32 ret;
td_u32 offset;
td_u32 size;
td_u32 crc;
td_u8 data[0];
} transmit_data_reply_pkt;
typedef struct {
td_u32 transmit_id;
td_u32 state_code;
td_u32 len;
td_u8 data[0];
} transmit_state_notify_pkt;
typedef struct {
td_u16 name_size;
td_u16 pad;
td_char file_name[0];
} transmit_save_file_start_info;
typedef struct {
td_u32 transmit_id;
td_u16 pad;
td_u16 transmit_type;
td_u32 total_size;
td_u32 info_size;
td_u8 info[0];
} transmit_start_pkt;
typedef struct {
td_u32 dir_len;
td_char name[128];
} ext_diag_ls_cmd;
typedef struct {
td_u16 idx;
td_u16 path_len;
td_u32 file_size;
td_char name[128];
} ext_diag_ls_ind;

41
build/config/target_config/ws63/hdb_config/database_template/acore/system/diag/base_datatype_def.txt Executable file
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UINT32 32 0
UINT16 16 0
UINT8 8 0
INT32 32 1
INT16 16 1
INT8 8 1
enum 32 0
HSO_ENUM 32 0
u32 32 0
u16 16 0
u8 8 0
s32 32 1
s16 16 1
s8 8 1
BOOL 8 0
TD_U8A 8 0
TD_U16A 16 0
TD_CHARTA 8 1 1
td_u32 32 0
td_u16 16 0
td_u8 8 0
td_s32 32 1
td_s16 16 1
td_s8 8 1
td_bool 8 0
td_char 8 1 1
char 8 1 1
long 32 1
td_pvoid 32 0
td_pbyte 32 0
uint8_t 8 0
uint16_t 16 0
uint32_t 32 0

250
build/config/target_config/ws63/hdb_config/database_template/acore/system/diag/fix_struct_def.txt Executable file
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#include "base_datatype_def.txt"
typedef struct {
} tool_null_stru;
typedef struct {
td_u8 array[0];
}tool_u8_array;
typedef struct {
td_u32 array[0];
}tool_u32_array;
typedef struct {
td_u32 data;
}tool_u32;
typedef struct {
char str[1];
} tool_str;
typedef struct {
td_u16 key;
} nv_key_info_t;
typedef struct {
td_u16 key;
td_u16 length;
td_u8 value[300];
} nv_key_write_info_t;
typedef struct {
td_u16 key;
td_u16 length;
td_u8 value[300];
td_bool permanent;
td_bool encrypted;
td_bool non_upgrade;
} nv_key_write_with_attr_info_t;
typedef struct {
td_u32 package_len;
} upg_prepare_info_t;
typedef struct {
td_u32 id;
td_char name[32];
td_u32 usage;
} dfx_cpup_item;
typedef struct {
td_u32 param;
} dfx_diag_cpup_cmd;
typedef struct {
td_u32 total;
td_u32 used;
td_u32 free;
td_u32 free_node_num;
td_u32 used_node_num;
td_u32 max_free_node_size;
td_u32 peek_size;
} ext_mdm_mem_info;
typedef struct {
td_u8 timer_usage;
td_u8 task_usage;
td_u8 sem_usage;
td_u8 queue_usage;
td_u8 mux_usage;
} osal_os_resource_use_stat;
typedef struct {
td_char name[32];
td_u32 valid;
td_u32 id;
td_u16 status;
td_u16 priority;
td_pvoid task_sem;
td_pvoid task_mutex;
td_u32 event_stru[3];
td_u32 event_mask;
td_u32 stack_size;
td_u32 top_of_stack;
td_u32 bottom_of_stack;
td_u32 sp;
td_u32 curr_used;
td_u32 peak_used;
td_u32 overflow_flag;
} ext_task_info;
typedef struct {
td_u32 id;
} ext_dbg_stat_q;
typedef struct {
td_bool enable;
td_u8 channel;
td_u8 band;
td_u32 cycle;
td_u16 duration;
} psd_enable_stru;
typedef struct {
td_s8 psd_result[1024];
} psd_report_stru;
typedef struct {
td_u32 addr;
td_u32 len;
} read_mem;
typedef struct {
td_u32 start_addr;
td_u32 end_addr;
} cycle_read_mem;
typedef struct {
td_u32 len;
td_u32 data[80];
} read_mem_ind;
typedef struct {
td_u32 start_addr;
td_u32 cnt;
} mem_read_cmd_t;
typedef struct {
td_u32 start_addr;
td_u32 size;
}mem_read_ind_head_t;
typedef struct {
mem_read_ind_head_t head;
td_u32 data[80];
}mem_read32_ind_t;
typedef struct {
mem_read_ind_head_t head;
td_u16 data[80];
}mem_read16_ind_t;
typedef struct {
mem_read_ind_head_t head;
td_u8 data[80];
}mem_read8_ind_t;
typedef struct {
td_u32 start_addr;
td_u32 val;
} mem_write_cmd_t;
typedef struct {
td_u32 ret;
} mem_write_ind_t;
typedef struct {
td_u32 baud_rate;
td_u8 data_bits;
td_u8 stop_bits;
td_u8 parity;
td_u8 pad;
} uart_attr_t;
typedef struct {
td_u32 case_id;
td_u32 data[3];
}diag_dfx_cmd_req_st;
typedef struct {
td_u32 case_id;
td_u32 data[3];
}diag_dfx_cmd_ind_st;
typedef struct {
td_u32 put_msg_2_cache_fail_times;
td_u16 dfx_msg_q_num;
td_u16 dfx_msg_q_peak_num;
td_u16 transmit_msg_q_num;
td_u16 transmit_msg_q_peak_num;
td_u32 dfx_msg_process_max_time;
td_u32 transmit_msg_process_max_time;
td_u32 send_local_q_fail;
td_u32 send_local_q_success;
td_u32 transmit_msg_rev_cnt;
td_u32 msg_rev_cnt;
td_u32 diag_pkt_msg_rev_cnt;
td_u32 beat_heart_msg_rev_cnt;
td_u32 channel_receive_data_cnt[4];
td_u32 channel_receive_frame_cnt[4];
td_u32 mem_pkt_alloc_size[2];
td_u32 mem_pkt_free_size[2];
td_u32 alloc_mem_size;
td_u32 alloc_mem_peak_size;
td_u32 conn_excep_cnt;
td_u32 conn_bu_cnt;
} zdiag_dfx_stat;
typedef struct {
td_u32 transmit_id;
td_u32 ret;
td_u32 offset;
td_u32 size;
td_u32 crc;
td_u32 data[1];
} transmit_data_reply_pkt;
typedef struct {
td_u32 flag;
td_u32 transmit_id;
} diag_sample_data_cmd_t;
typedef struct {
td_u32 ret;
td_u32 flag;
td_u32 transmit_id;
} diag_sample_data_ind_t;
typedef struct {
td_u32 file_num;
} last_dump_start_ind_t;
typedef struct {
char name[64];
td_u32 total_size;
td_u32 offset;
td_u32 size;
td_u32 crc;
td_u8 data[0];
} last_dump_data_ind_t;
typedef struct {
char name[64];
td_u32 total_size;
} last_dump_data_ind_finish_t;
typedef struct {
td_u32 stack_limit;
td_u32 fault_type;
td_u32 fault_reason;
td_u32 address;
td_u32 reg_value[32];
td_u32 psp_value;
td_u32 lr_value;
td_u32 pc_value;
td_u32 psps_value;
td_u32 primask_value;
td_u32 fault_mask_value;
td_u32 bserpri_value;
td_u32 control_value;
} diag_last_word_ind_t;

755
build/config/target_config/ws63/hdb_config/database_template/acore/system/diag/prot_core_hso_msg_struct_def.txt Executable file
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#include "base_datatype_def.txt"
typedef enum {
EXT_UART_IDX_0,
EXT_UART_IDX_1,
EXT_UART_IDX_2,
EXT_UART_IDX_MAX,
EXT_UART_IDX_INVALID_ID = 0xFF,
} ext_uart_idx;
typedef enum {
EXT_DMA_CHANNEL_NONE = 0xFF,
EXT_DMA_CHANNEL_0 = 0,
EXT_DMA_CHANNEL_1,
EXT_DMA_CHANNEL_2,
EXT_DMA_CHANNEL_3,
EXT_DMA_CHANNEL_MAX_NUM,
} ext_dma_channel;
typedef enum {
EXT_DMA_PERIPHERAL_MEMORY = 0,
EXT_DMA_PERIPHERAL_UART0_TX = 1,
EXT_DMA_PERIPHERAL_UART0_RX = 2,
EXT_DMA_PERIPHERAL_SSP_TX = 3,
EXT_DMA_PERIPHERAL_SSP_RX = 4,
EXT_DMA_PERIPHERAL_MAX_NUM,
} ext_dma_peripheral;
typedef enum {
EXT_DMA_CH_PRIORITY_HIGHEST = 0,
EXT_DMA_CH_PRIORITY_HIGH_1 = 1,
EXT_DMA_CH_PRIORITY_HIGH_2 = 2,
EXT_DMA_CH_PRIORITY_LOWEST = 3,
EXT_DMA_CH_PRIORITY_MAX
} ext_dma_ch_priority;
typedef enum {
EXT_HWTIMER_ID_0,
EXT_HWTIMER_ID_1,
EXT_HWTIMER_ID_2,
EXT_HWTIMER_ID_3,
EXT_HWTIMER_ID_4,
EXT_HWTIMER_ID_5,
EXT_HWTIMER_ID_6,
EXT_HWTIMER_ID_7,
EXT_HWTIMER_ID_MAX,
} ext_hwtimer_id;
typedef enum {
EXT_CLK_IPC = 0,
EXT_CLK_UART0,
EXT_CLK_UART1,
EXT_CLK_UART2,
EXT_CLK_TIMER0,
EXT_CLK_TIMER1,
EXT_CLK_TIMER2,
EXT_CLK_TIMER3,
EXT_CLK_TIMER4,
EXT_CLK_TIMER5,
EXT_CLK_TIMER6,
EXT_CLK_TIMER7,
EXT_CLK_WDT,
EXT_CLK_GPIO,
EXT_CLK_DMA,
EXT_CLK_CPU,
EXT_CLK_TSENSOR,
EXT_CLK_ID_MAX,
EXT_CLK_ID_INVALID_ID = 0xFFFFFFFF,
} ext_clk_id;
typedef struct {
td_u32 reg_base_addr;
td_u32 irq_number;
td_u32 channel_max_num;
td_u32 peripheral_max_num;
td_u32 lowest_priority;
} ext_dma_device;
td_void dma_resource_init(td_void);
td_void uart_resource_init(td_void);
td_void ipc_resource_init(td_void);
td_void hrtimer_resource_init(td_void);
td_void hwtimer_resource_init(td_void);
td_void rtc_resource_init(td_void);
td_void rtc_calendar_resource_init(td_void);
td_void i2c_resource_init(td_void);
td_void clk_resource_init(td_void);
td_void io_resource_init(td_void);
td_void pwm_resource_init(td_void);
td_void spi_resource_init(td_void);
td_void watchdog_resource_init(td_void);
td_void tsensor_resource_init(td_void);
td_void share_os_res_resource_init(td_void);
td_void dntc_resource_init(td_void);
typedef enum {
EXT_DMA_POWER_OF_BURST_0 = 0,
EXT_DMA_POWER_OF_BURST_1 = 1,
EXT_DMA_POWER_OF_BURST_2 = 2,
EXT_DMA_POWER_OF_BURST_3 = 3,
EXT_DMA_POWER_OF_BURST_4 = 4,
EXT_DMA_POWER_OF_BURST_5 = 5,
EXT_DMA_POWER_OF_BURST_6 = 6,
EXT_DMA_POWER_OF_BURST_7 = 7,
EXT_DMA_POWER_OF_BURST_8 = 8,
EXT_DMA_POWER_OF_BURST_9 = 9,
EXT_DMA_POWER_OF_BURST_10 = 10,
} ext_dma_power_of_burst;
typedef struct {
ext_dma_power_of_burst power_of_burst;
td_bool use_burst;
td_u8 pad[3];
} ext_dma_peripheral_feature;
typedef td_void (*ext_dma_transfer_peripheral_prepare_callback)(ext_dma_peripheral src, ext_dma_peripheral dst);
typedef td_void (*ext_dma_transfer_peripheral_finish_callback)(ext_dma_peripheral src, ext_dma_peripheral dst);
typedef struct {
ext_dma_peripheral src_periph;
ext_dma_peripheral dst_periph;
ext_dma_peripheral_feature feature;
ext_dma_transfer_peripheral_prepare_callback transfer_prepare;
ext_dma_transfer_peripheral_finish_callback transfer_finish;
} ext_dma_peripheral_config;
typedef enum {
EXT_DMA_DATA_WIDTH_BYTE = 0x0,
EXT_DMA_DATA_WIDTH_HALFWORD = 0x1,
EXT_DMA_DATA_WIDTH_WORD = 0x2,
EXT_DMA_DATA_WIDTH_MAX = 0x3,
} ext_dma_data_width;
typedef enum {
EXT_DMA_CH_TRANSFER_TYPE_MEM_TO_MEM = 0,
EXT_DMA_CH_TRANSFER_TYPE_MEM_TO_PERIPHERAL = 1,
EXT_DMA_CH_TRANSFER_TYPE_PERIPHERAL_TO_MEM = 2,
EXT_DMA_CH_TRANSFER_TYPE_PERIPHERAL_TO_PERIPHERAL = 3,
EXT_DMA_CH_TRANSFER_TYPE_MAX
} ext_dma_ch_transfer_type;
typedef enum {
EXT_DMA_CH_CYCLE_TYPE_SINGLE = 0,
EXT_DMA_CH_CYCLE_TYPE_BATCHED_PART = 1,
EXT_DMA_CH_CYCLE_TYPE_BATCHED_END = 2,
EXT_DMA_CH_CYCLE_TYPE_MAX
} ext_dma_ch_cycle_type;
typedef enum {
EXT_DMA_INTERRUPT_DONE,
EXT_DMA_INTERRUPT_ERR,
EXT_DMA_INTERRUPT_MAX
} ext_dma_interrupt;
typedef td_void (*ext_dma_transfer_callback)(ext_dma_interrupt intr);
typedef struct {
td_u32 src_addr;
td_u32 dst_addr;
td_u16 transfer_num;
ext_dma_data_width data_width;
ext_dma_ch_cycle_type cycle_type;
} ext_dma_ch_user_config;
ext_errno uapi_dma_init(td_void);
td_void uapi_dma_deinit(td_void);
ext_errno uapi_dma_open_ch(ext_dma_channel *ch, ext_dma_ch_priority pri,
const ext_dma_peripheral_config *config);
ext_errno uapi_dma_close_ch(ext_dma_channel ch);
ext_errno uapi_dma_transfer(ext_dma_channel ch, const ext_dma_ch_user_config *user_cfg,
ext_dma_transfer_callback callback, td_bool block);
typedef enum {
EXT_UART_DATA_BIT_5 = 5,
EXT_UART_DATA_BIT_6,
EXT_UART_DATA_BIT_7,
EXT_UART_DATA_BIT_8,
} ext_uart_data_bit;
typedef enum {
EXT_UART_PARITY_NONE,
EXT_UART_PARITY_ODD,
EXT_UART_PARITY_EVEN,
} ext_uart_parity;
typedef enum {
EXT_UART_STOP_BIT_1 = 1,
EXT_UART_STOP_BIT_2,
} ext_uart_stop_bit;
typedef enum {
EXT_UART_FLOW_CTRL_NONE = 0x0,
EXT_UART_FLOW_CTS = 0x1,
EXT_UART_FLOW_RTS = 0x2,
EXT_UART_FLOW_CTRL_RTS_CTS = EXT_UART_FLOW_CTS | EXT_UART_FLOW_RTS,
EXT_UART_FLOW_CTRL_SOFT = 0x4,
} ext_uart_flow_ctrl;
typedef enum {
EXT_UART_ERR_FRAM = 0x1,
EXT_UART_ERR_PARITY = 0x2,
EXT_UART_ERR_BREAK = 0x4,
EXT_UART_ERR_OVER_RUN = 0x8,
} ext_uart_err_type;
typedef struct {
td_u32 baud_rate;
td_u8 data_bits;
td_u8 stop_bits;
td_u8 parity;
td_u8 pad;
} ext_uart_attr;
typedef struct {
td_bool tx_use_dma;
td_u8 tx_dma_ch_priority;
td_u16 rx_buf_size;
td_u16 tx_buf_size;
} ext_uart_extra_attr;
typedef struct {
ext_dma_ch_cycle_type cycle_type;
ext_dma_transfer_callback done_callback;
} ext_uart_write_dma_config;
typedef enum {
EXT_UART_NOTIFY_RX_MASK_IDLE = 0x1,
EXT_UART_NOTIFY_RX_SUFFICIENT_DATA = 0x2,
EXT_UART_NOTIFY_RX_ERR = 0x4,
EXT_UART_NOTIFY_RX_DATA = 0x8,
EXT_UART_NOTIFY_TX_FINISH = 0x10,
EXT_UART_NOTIFY_ALL_MASK = 0x1F,
} ext_uart_rx_hook_type;
typedef td_void(*ext_uart_rx_hook)(ext_uart_rx_hook_type type, td_u16 data);
ext_errno uapi_uart_init(ext_uart_idx id, TD_CONST ext_uart_attr *attr, TD_CONST ext_uart_extra_attr *advance_attr);
ext_errno uapi_uart_set_attr(ext_uart_idx id, ext_uart_attr *attr);
ext_errno uapi_uart_get_attr(ext_uart_idx id, ext_uart_attr *attr);
td_s32 uapi_uart_read(ext_uart_idx id, td_u8 *data, td_u32 len);
td_s32 uapi_uart_write(ext_uart_idx id, TD_CONST td_u8 *data, td_u32 len);
ext_errno uapi_uart_deinit(ext_uart_idx id);
ext_errno uapi_uart_register_rx_callback(ext_uart_idx id,
td_u32 hook_mask,
td_u16 sufficient_cnt,
ext_uart_rx_hook hook);
td_bool uapi_uart_has_pending_transmissions(ext_uart_idx id);
ext_errno uapi_uart_flush_rx_data(ext_uart_idx id);
td_s32 uapi_uart_write_by_dma(ext_uart_idx id, TD_CONST td_u8 *data, td_u16 len, ext_uart_write_dma_config *dma_cfg);
ext_errno uapi_uart_set_flow_ctrl(ext_uart_idx id, ext_uart_flow_ctrl type);
ext_errno uapi_uart_set_software_flow_ctrl_level(ext_uart_idx id, td_u16 lower_water_margin, td_u16 upper_water_margin);
ext_errno uapi_uart_set_tx_timeout(ext_uart_idx id, td_u32 block_ms);
ext_errno uapi_uart_set_rx_timeout(ext_uart_idx id, td_u32 block_ms);
td_s32 uapi_uart_get_rx_data_count(ext_uart_idx id);
typedef td_u32 (*diag_cmd_f_prv)(td_u16 cmd_id, td_pvoid cmd_param, td_u16 cmd_param_size, td_u8 option);
typedef struct {
td_u16 min_id;
td_u16 max_id;
diag_cmd_f_prv fn_input_cmd;
} ext_diag_cmd_reg_obj;
td_u32 diag_register_cmd_prv(TD_CONST ext_diag_cmd_reg_obj *cmd_tbl, td_u16 cmd_num);
td_bool diag_is_connect_prv(td_void);
td_u32 diag_report_packet_prv(td_u16 cmd_id, td_u8 instance_id, TD_CONST td_pbyte packet,
td_u16 pakcet_size, td_bool sync);
td_u32 diag_init_prv(td_void);
typedef struct {
} diag_log_msg0;
typedef struct {
td_u32 data0;
} diag_log_msg1;
typedef struct {
td_u32 data0;
td_u32 data1;
} diag_log_msg2;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
} diag_log_msg3;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
td_u32 data3;
} diag_log_msg4;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
td_u32 data3;
td_u32 data4;
} diag_log_msg5;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
td_u32 data3;
td_u32 data4;
td_u32 data5;
} diag_log_msg6;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
td_u32 data3;
td_u32 data4;
td_u32 data5;
td_u32 data6;
} diag_log_msg7;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
td_u32 data3;
td_u32 data4;
td_u32 data5;
td_u32 data6;
td_u32 data7;
} diag_log_msg8;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
td_u32 data3;
td_u32 data4;
td_u32 data5;
td_u32 data6;
td_u32 data7;
td_u32 data8;
} diag_log_msg9;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
td_u32 data3;
td_u32 data4;
td_u32 data5;
td_u32 data6;
td_u32 data7;
td_u32 data8;
td_u32 data9;
} diag_log_msg10;
typedef enum {
APPLICATION_CORE = 0,
PROTOCOL_CORE,
SECURITY_CORE,
} core_type;
typedef struct {
td_u32 data0[5];
td_u32 data1;
} user_define_struct1;
typedef struct {
td_u32 data0;
td_u32 data1;
user_define_struct1 data2;
} user_define_struct0;
td_u32 diag_log_msg0_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod);
td_u32 diag_log_msg1_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, td_u32 d0);
td_u32 diag_log_msg2_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, td_u32 d0, td_u32 d1);
td_u32 diag_log_msg3_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, diag_log_msg3 log_msg);
td_u32 diag_log_msg4_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, diag_log_msg4 log_msg);
td_u32 diag_log_msg_buffer_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, td_pvoid buffer, td_u16 size);
td_void dms_regist_app_uart_rx_prv(td_pvoid fun1, td_pvoid fun2);
td_void dms_regist_app_uart_cb_prv(td_pvoid fun);
typedef struct {
td_s16 module;
td_s16 x2b_surround;
td_s16 x2b_sound_width;
td_s16 eq_pre_gain_lr;
td_s16 eq_bands_lr;
td_s16 eq_type_lr[12];
td_s16 eq_gain_lr[12];
td_s16 eq_q[2][12];
td_s16 eq_fc[2][12];
td_s16 drc_gain;
td_s16 drc_paral_glr;
td_s16 drc_looka_lr;
td_s16 lmt_th;
} audio_sws_mobile_para;
typedef struct {
td_char name[32];
td_u32 id;
td_u16 status;
td_u16 priority;
td_pvoid task_sem;
td_pvoid task_mutex;
td_u32 event_stru[3];
td_u32 event_mask;
td_u32 stack_size;
td_u32 top_of_stack;
td_u32 bottom_of_stack;
td_u32 sp;
td_u32 curr_used;
td_u32 peak_used;
td_u32 overflow_flag;
} ext_task_info;
typedef struct {
td_u16 task_prio;
td_u32 stack_size;
td_u32 task_policy;
td_u32 task_nice;
td_u32 task_cpuid;
td_char *task_name;
td_void *resved;
} ext_task_attr;
ext_errno uapi_task_create(td_u32 *taskid, const ext_task_attr *attr,
td_void *(*task_route)(td_void *), td_void *arg);
ext_errno uapi_task_delete(td_u32 taskid);
ext_errno uapi_task_suspend(td_u32 taskid);
ext_errno uapi_task_resume(td_u32 taskid);
ext_errno uapi_task_get_priority(td_u32 taskid, td_u32 *priority);
ext_errno uapi_task_set_priority(td_u32 taskid, td_u32 priority);
td_u32 uapi_task_get_current_id(td_void);
td_void uapi_task_lock(td_void);
td_void uapi_task_unlock(td_void);
td_bool uapi_task_is_lock(td_void);
ext_errno uapi_sleep(td_u32 ms);
typedef struct {
td_u32 total;
td_u32 used;
td_u32 free;
td_u32 free_node_num;
td_u32 used_node_num;
td_u32 max_free_node_size;
td_u32 malloc_fail_count;
td_u32 peek_size;
} ext_mdm_mem_info;
typedef struct {
td_u32 pool_addr;
td_u32 pool_size;
td_u32 fail_count;
td_u32 cur_use_size;
td_u32 peek_size;
} ext_mem_pool_crash_info;
td_pvoid uapi_malloc(td_u32 size);
td_void uapi_free(const td_pvoid addr);
TD_CONST ext_mem_pool_crash_info *uapi_mem_get_sys_info_crash(td_void);
ext_errno uapi_pool_mem_init(td_void *pool, td_u32 size);
td_void *uapi_pool_mem_alloc(td_void *pool, td_ulong size);
td_void uapi_pool_mem_free(td_void *pool, TD_CONST td_void *addr);
ext_errno uapi_pool_mem_deinit(td_void *pool);
typedef struct {
td_u8 timer_usage;
td_u8 task_usage;
td_u8 sem_usage;
td_u8 queue_usage;
td_u8 mux_usage;
td_u8 event_usage;
td_u16 err_info;
} ext_os_resource_use_stat;
ext_errno uapi_os_get_resource_status(ext_os_resource_use_stat *os_resource_stat);
td_void uapi_os_task_join(td_u32 taskid, td_u32 wait_interval);
ext_errno uapi_os_get_task_info(td_u32 taskid, ext_task_info *inf);
ext_errno uapi_os_get_mem_sys_info(TD_OUT ext_mdm_mem_info *mem_inf);
typedef enum {
EXCEPTION_PHASE_INITIALIZATION,
EXCEPTION_PHASE_TASK,
EXCEPTION_PHASE_INTERRUPT,
EXCEPTION_PHASE_MAX_TYPE
} ext_exception_phase_type;
typedef struct {
td_u32 mepc;
td_u32 ra;
td_u32 sp;
} ext_exception_cpu_basic_info;
typedef struct {
td_u32 mcause;
td_u32 mstatus;
td_u32 ccause;
td_u32 mtval;
td_u32 gp;
td_u32 tp;
td_u32 t0;
td_u32 t1;
td_u32 t2;
td_u32 s0;
td_u32 s1;
td_u32 a0;
td_u32 a1;
td_u32 a2;
td_u32 a3;
td_u32 a4;
td_u32 a5;
td_u32 a6;
td_u32 a7;
td_u32 s2;
td_u32 s3;
td_u32 s4;
td_u32 s5;
td_u32 s6;
td_u32 s7;
td_u32 s8;
td_u32 s9;
td_u32 s10;
td_u32 s11;
td_u32 t3;
td_u32 t4;
td_u32 t5;
td_u32 t6;
} ext_exception_cpu_extend_info;
typedef struct {
td_u32 event_type;
td_u32 task;
td_u64 time;
td_uintptr_t identity;
td_uintptr_t params[2];
} ext_exception_track_info;
typedef struct {
ext_exception_cpu_basic_info basic_info;
ext_exception_cpu_extend_info extend_info;
} ext_exception_cpu_register;
typedef struct {
td_u16 is_irq;
td_u16 type;
td_u32 faultaddr;
td_u32 thrdpid;
td_u32 stack_top;
td_u32 stack_bottom;
} ext_exception_schedule_info;
typedef struct {
ext_exception_cpu_register exc_cpu_context;
ext_exception_schedule_info schedule_info;
} ext_exception_context;
typedef enum {
CORES_APPLICATION_CORE = 0,
CORES_PROTOCOL_CORE,
CORES_SECURITY_CORE,
CORES_DSP_CORE,
CORES_CGRA_CORE,
CORES_IOMCU_CORE,
CORES_MAX_NUMBER_PHYSICAL,
CORES_UNKNOWN,
} cores;
typedef enum {
EXT_SYSERR_NO_USED = 0,
EXT_SYSERR_WATCH_DOG = 1,
EXT_SYSERR_OLD_PANIC,
EXT_SYSERR_LOS_PANIC,
EXT_SYSERR_CPU_EXEC,
EXT_SYSERR_OS_ERR,
EXT_SYSERR_MAX_MAIN_TYPE
} ext_syserr_main_type;
typedef enum {
SYSERR_QUERY_SPECIFY_BLOCK_ID0,
SYSERR_QUERY_SPECIFY_BLOCK_ID1,
SYSERR_QUERY_SPECIFY_BLOCK_ID2,
SYSERR_QUERY_SPECIFY_BLOCK_ID3,
SYSERR_QUERY_SPECIFY_BLOCK_ID4,
SYSERR_QUERY_SPECIFY_BLOCK_ID5,
SYSERR_QUERY_SPECIFY_BLOCK_ID6,
SYSERR_QUERY_SPECIFY_BLOCK_ID7,
SYSERR_QUERY_SPECIFY_BLOCK_MAX_TYPE,
SYSERR_LASTEST_STORED_BLOCK,
SYSERR_NEW_STORE_BLOCK,
SYSERR_BLOCK_MAX_TYPE,
} syserr_info_type;
typedef struct {
td_u8 core[1];
} dbk_str_type;
typedef struct {
td_u32 head_magic;
td_bool save_ind;
td_u8 core;
td_u16 structure_ver;
td_u32 size;
} ext_syserr_head_info;
typedef struct {
td_u16 main_type;
td_u16 pad;
td_u32 sub_type;
ext_exception_cpu_basic_info cpu_context;
} ext_syserr_basic_context_info;
typedef struct {
td_u8 is_isr;
td_u8 pad[3];
td_u32 id;
td_u32 top;
td_u32 bottom;
td_u32 revised_top;
td_u32 revised_bottom;
td_u32 revised_sp;
} ext_syserr_base_stack_info;
typedef struct {
ext_syserr_basic_context_info basic_context[2];
ext_syserr_base_stack_info basic_stack[2];
td_u32 trace[40];
} ext_syserr_lite_info;
typedef struct {
td_u32 crash_sec;
td_u32 soft_version;
td_u8 loop;
td_u8 last_trap_level;
td_u16 process_map;
td_u32 data[5];
} ext_syserr_crash_scene;
typedef struct {
ext_exception_cpu_extend_info cpu_register;
} ext_syserr_cpu_extend_register;
typedef struct {
td_u32 stat_errno;
ext_os_resource_use_stat resource_stat;
} ext_syserr_sys_status;
typedef struct {
ext_mem_pool_crash_info mem;
} ext_syserr_mem_info;
typedef struct {
td_u32 peek;
td_u32 top_content;
td_u32 stack[0x10];
td_char name[32];
} ext_syserr_extend_stack_info;
typedef struct {
td_u32 end_magic;
} ext_syserr_tail;
typedef struct {
ext_syserr_head_info head;
ext_syserr_crash_scene scene;
ext_syserr_lite_info lite_info;
ext_syserr_cpu_extend_register cpu;
ext_syserr_sys_status sys;
ext_syserr_mem_info mem;
ext_syserr_extend_stack_info stack;
ext_syserr_tail tail;
} ext_syserr_info;
typedef td_void (*uapi_syserr_hook)(td_u32 main_type, td_u32 sub_type);
td_void uapi_syserr_set_unreboot(td_void);
td_void uapi_syserr_register_hook(uapi_syserr_hook hook);
td_void uapi_syserr_panic(td_u32 reason, td_u32 data0, td_u32 data1, td_u32 data2, td_u32 data3);
td_u32 uapi_syserr_query_crash_info(cores src_core, syserr_info_type type, ext_syserr_info *dest_addr);
typedef unsigned int uintptr_t;
typedef int intptr_t;
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed int int32_t;
typedef signed long long int64_t;
typedef signed long long intmax_t;
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long long uint64_t;
typedef unsigned long long uintmax_t;
typedef int8_t int_fast8_t;
typedef int64_t int_fast64_t;
typedef int8_t int_least8_t;
typedef int16_t int_least16_t;
typedef int32_t int_least32_t;
typedef int64_t int_least64_t;
typedef uint8_t uint_fast8_t;
typedef uint64_t uint_fast64_t;
typedef uint8_t uint_least8_t;
typedef uint16_t uint_least16_t;
typedef uint32_t uint_least32_t;
typedef uint64_t uint_least64_t;
typedef int32_t int_fast16_t;
typedef int32_t int_fast32_t;
typedef uint32_t uint_fast16_t;
typedef uint32_t uint_fast32_t;
typedef unsigned char td_uchar;
typedef unsigned char td_u8;
typedef unsigned short td_u16;
typedef unsigned int td_u32;
typedef unsigned long long td_u64;
typedef unsigned long td_ulong;
typedef char td_char;
typedef signed char td_s8;
typedef short td_s16;
typedef int td_s32;
typedef long long td_s64;
typedef long td_slong;
typedef float td_float;
typedef double td_double;
typedef void td_void;
typedef td_u8 td_bool;
typedef td_u32 td_handle;
typedef td_u8 td_byte;
typedef td_byte* td_pbyte;
typedef void* td_pvoid;
typedef volatile td_u32 td_u32_reg;
typedef unsigned long td_size_t;
typedef signed long td_ssize_t;
typedef unsigned long td_length_t;
typedef unsigned long long td_mem_size_t;
typedef long long td_mem_handle_t;
typedef unsigned int td_fr32;
typedef uintptr_t td_uintptr_t;
typedef unsigned int td_phys_addr_t;
typedef unsigned int td_virt_addr_t;
typedef unsigned int td_phys_addr_bit32;
typedef struct {
td_u32 case_id;
td_u32 data[3];
}diag_dfx_cmd_req_st;
typedef struct {
td_u32 case_id;
td_u32 data[3];
}diag_dfx_cmd_ind_st;
typedef struct {
td_u32 put_msg_2_cache_fail_times;
td_u32 send_ipc_times;
td_u32 send_used_size;
td_u32 log_receive_times;
td_u32 log_reported_times;
td_u32 send_local_q_fail;
td_u32 record_idx;
td_u32 channel_receive_data_cnt[4];
td_u32 mem_pkt_alloc_size[2];
td_u32 mem_pkt_free_size[2];
} zdiag_dfx_stat;
typedef struct {
td_u32 dir;
td_u32 random_data;
} diag_beat_heart_cmd_ind;
typedef struct {
td_u32 offset;
td_u32 size;
} ext_diag_dump_item;
typedef struct {
td_u32 len;
td_char name[128];
td_u32 cnt;
ext_diag_dump_item item[0];
} ext_diag_dump_by_name_cmd;
typedef struct {
td_u32 ret;
td_u32 offset;
td_u32 size;
td_u8 data[0];
} ext_diag_dump_by_name_ind;
typedef enum {
TRANSMIT_STATE_NOTIFY_INVALID_ID = 10,
TRANSMIT_STATE_NOTIFY_FINISH,
TRANSMIT_STATE_NOTIFY_FINISH_2,
TRANSMIT_STATE_NOTIFY_DUPLICATE_ID,
} transmit_state_notify_code;
typedef enum {
TRANSMIT_TYPE_READ_FILE,
TRANSMIT_TYPE_DUMP,
TRANSMIT_TYPE_SAVE_FILE,
} transmit_type;
typedef struct {
td_u32 offset;
td_u32 size;
} transmit_data_request_item;
typedef struct {
td_u32 transmit_id;
td_u32 cnt;
transmit_data_request_item item[0];
} transmit_data_request_pkt;
typedef struct {
td_u32 transmit_id;
td_u32 ret;
td_u32 offset;
td_u32 size;
td_u32 crc;
td_u8 data[0];
} transmit_data_reply_pkt;
typedef struct {
td_u32 transmit_id;
td_u32 state_code;
td_u32 len;
td_u8 data[0];
} transmit_state_notify_pkt;
typedef struct {
td_u16 name_size;
td_u16 pad;
td_char file_name[0];
} transmit_save_file_start_info;
typedef struct {
td_u32 transmit_id;
td_u16 pad;
td_u16 transmit_type;
td_u32 total_size;
td_u32 info_size;
td_u8 info[0];
} transmit_start_pkt;
typedef struct {
td_u32 dir_len;
td_char name[128];
} ext_diag_ls_cmd;
typedef struct {
td_u16 idx;
td_u16 path_len;
td_u32 file_size;
td_char name[128];
} ext_diag_ls_ind;

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#include "base_datatype_def.txt"

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build/config/target_config/ws63/hdb_config/database_template/acore/system/diag/ws63_mcore_hso_msg_struct_def.txt Executable file
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#include "base_datatype_def.txt"
typedef enum {
EXT_UART_IDX_0,
EXT_UART_IDX_1,
EXT_UART_IDX_2,
EXT_UART_IDX_3,
EXT_UART_IDX_LP,
EXT_UART_IDX_MAX,
EXT_UART_IDX_INVALID_ID = 0xFF,
} ext_uart_idx;
typedef enum {
EXT_DMA_PERIPHERAL_MEMORY = 0,
EXT_DMA_PERIPHERAL_UART0_TX = 1,
EXT_DMA_PERIPHERAL_UART0_RX = 2,
EXT_DMA_PERIPHERAL_UART1_TX = 3,
EXT_DMA_PERIPHERAL_UART1_RX = 4,
EXT_DMA_PERIPHERAL_MAX_NUM,
} ext_dma_peripheral;
typedef enum {
EXT_DMA_CHANNEL_NONE = 0xFF,
EXT_DMA_CHANNEL_0 = 0,
EXT_DMA_CHANNEL_1,
EXT_DMA_CHANNEL_MAX_NUM,
} ext_dma_channel;
typedef enum {
EXT_DMA_CH_PRIORITY_HIGHEST = 0,
EXT_DMA_CH_PRIORITY_HIGH_1 = 1,
EXT_DMA_CH_PRIORITY_HIGH_2 = 2,
EXT_DMA_CH_PRIORITY_LOWEST = 3,
EXT_DMA_CH_PRIORITY_RESERVED = 0xFF
} ext_dma_ch_priority;
typedef enum {
EXT_CLK_CPU = 0,
EXT_CLK_TIMER0 = 1,
EXT_CLK_TIMER1 = 2,
EXT_CLK_TIMER2 = 3,
EXT_CLK_WDT = 4,
EXT_CLK_GPIO = 5,
EXT_CLK_TSENSOR = 6,
EXT_CLK_ID_MAX,
EXT_CLK_ID_INVALID_ID = 0xFFFFFFFF,
} ext_clk_id;
typedef struct {
td_u32 reg_base_addr;
td_u32 irq_number;
td_u32 channel_max_num;
td_u32 peripheral_max_num;
td_u32 lowest_priority;
} ext_dma_device;
td_void dma_resource_init(td_void);
td_void uapi_malloc_resource_init(td_void);
td_void hrtimer_resource_init(td_void);
td_void uapi_tsensor_resource_init(td_void);
td_void uapi_io_resource_init(td_void);
typedef enum {
EXT_DMA_POWER_OF_BURST_0 = 0,
EXT_DMA_POWER_OF_BURST_1 = 1,
EXT_DMA_POWER_OF_BURST_2 = 2,
EXT_DMA_POWER_OF_BURST_3 = 3,
EXT_DMA_POWER_OF_BURST_4 = 4,
EXT_DMA_POWER_OF_BURST_5 = 5,
EXT_DMA_POWER_OF_BURST_6 = 6,
EXT_DMA_POWER_OF_BURST_7 = 7,
EXT_DMA_POWER_OF_BURST_8 = 8,
EXT_DMA_POWER_OF_BURST_9 = 9,
EXT_DMA_POWER_OF_BURST_10 = 10,
} ext_dma_power_of_burst;
typedef struct {
ext_dma_power_of_burst power_of_burst;
td_bool use_burst;
td_u8 pad[3];
} ext_dma_peripheral_feature;
typedef td_void (*ext_dma_transfer_peripheral_prepare_callback)(ext_dma_peripheral src, ext_dma_peripheral dst);
typedef td_void (*ext_dma_transfer_peripheral_finish_callback)(ext_dma_peripheral src, ext_dma_peripheral dst);
typedef struct {
ext_dma_peripheral src_periph;
ext_dma_peripheral dst_periph;
ext_dma_peripheral_feature feature;
ext_dma_transfer_peripheral_prepare_callback transfer_prepare;
ext_dma_transfer_peripheral_finish_callback transfer_finish;
} ext_dma_peripheral_config;
typedef enum {
EXT_DMA_DATA_WIDTH_BYTE = 0x0,
EXT_DMA_DATA_WIDTH_HALFWORD = 0x1,
EXT_DMA_DATA_WIDTH_WORD = 0x2,
EXT_DMA_DATA_WIDTH_MAX = 0x3,
} ext_dma_data_width;
typedef enum {
EXT_DMA_CH_TRANSFER_TYPE_MEM_TO_MEM = 0,
EXT_DMA_CH_TRANSFER_TYPE_MEM_TO_PERIPHERAL = 1,
EXT_DMA_CH_TRANSFER_TYPE_PERIPHERAL_TO_MEM = 2,
EXT_DMA_CH_TRANSFER_TYPE_PERIPHERAL_TO_PERIPHERAL = 3,
EXT_DMA_CH_TRANSFER_TYPE_MAX
} ext_dma_ch_transfer_type;
typedef enum {
EXT_DMA_CH_CYCLE_TYPE_SINGLE = 0,
EXT_DMA_CH_CYCLE_TYPE_BATCHED_PART = 1,
EXT_DMA_CH_CYCLE_TYPE_BATCHED_END = 2,
EXT_DMA_CH_CYCLE_TYPE_MAX
} ext_dma_ch_cycle_type;
typedef enum {
EXT_DMA_INTERRUPT_DONE,
EXT_DMA_INTERRUPT_ERR,
EXT_DMA_INTERRUPT_MAX
} ext_dma_interrupt;
typedef td_void (*ext_dma_transfer_callback)(ext_dma_interrupt intr);
typedef struct {
td_u32 src_addr;
td_u32 dst_addr;
td_u16 transfer_num;
ext_dma_data_width data_width;
ext_dma_ch_cycle_type cycle_type;
} ext_dma_ch_user_config;
ext_errno uapi_dma_init(td_void);
td_void uapi_dma_deinit(td_void);
ext_errno uapi_dma_open_ch(ext_dma_channel *ch, ext_dma_ch_priority pri,
const ext_dma_peripheral_config *config);
ext_errno uapi_dma_close_ch(ext_dma_channel ch);
ext_errno uapi_dma_transfer(ext_dma_channel ch, const ext_dma_ch_user_config *user_cfg,
ext_dma_transfer_callback callback, td_bool block);
typedef enum {
EXT_UART_DATA_BIT_5 = 5,
EXT_UART_DATA_BIT_6,
EXT_UART_DATA_BIT_7,
EXT_UART_DATA_BIT_8,
} ext_uart_data_bit;
typedef enum {
EXT_UART_PARITY_NONE,
EXT_UART_PARITY_ODD,
EXT_UART_PARITY_EVEN,
} ext_uart_parity;
typedef enum {
EXT_UART_STOP_BIT_1 = 1,
EXT_UART_STOP_BIT_2,
} ext_uart_stop_bit;
typedef enum {
EXT_UART_FLOW_CTRL_NONE = 0x0,
EXT_UART_FLOW_CTS = 0x1,
EXT_UART_FLOW_RTS = 0x2,
EXT_UART_FLOW_CTRL_RTS_CTS = EXT_UART_FLOW_CTS | EXT_UART_FLOW_RTS,
EXT_UART_FLOW_CTRL_SOFT = 0x4,
} ext_uart_flow_ctrl;
typedef enum {
EXT_UART_ERR_FRAM = 0x1,
EXT_UART_ERR_PARITY = 0x2,
EXT_UART_ERR_BREAK = 0x4,
EXT_UART_ERR_OVER_RUN = 0x8,
} ext_uart_err_type;
typedef struct {
td_u32 baud_rate;
td_u8 data_bits;
td_u8 stop_bits;
td_u8 parity;
td_u8 pad;
} ext_uart_attr;
typedef struct {
td_bool tx_use_dma;
td_u8 tx_dma_ch_priority;
td_u16 rx_buf_size;
td_u16 tx_buf_size;
} ext_uart_extra_attr;
typedef struct {
ext_dma_ch_cycle_type cycle_type;
ext_dma_transfer_callback done_callback;
} ext_uart_write_dma_config;
typedef enum {
EXT_UART_NOTIFY_RX_MASK_IDLE = 0x1,
EXT_UART_NOTIFY_RX_SUFFICIENT_DATA = 0x2,
EXT_UART_NOTIFY_RX_ERR = 0x4,
EXT_UART_NOTIFY_RX_DATA = 0x8,
EXT_UART_NOTIFY_TX_FINISH = 0x10,
EXT_UART_NOTIFY_ALL_MASK = 0x1F,
} ext_uart_rx_hook_type;
typedef td_void(*ext_uart_rx_hook)(ext_uart_rx_hook_type type, td_u16 data);
ext_errno uapi_uart_init(ext_uart_idx id, TD_CONST ext_uart_attr *attr, TD_CONST ext_uart_extra_attr *advance_attr);
ext_errno uapi_uart_set_attr(ext_uart_idx id, ext_uart_attr *attr);
ext_errno uapi_uart_get_attr(ext_uart_idx id, ext_uart_attr *attr);
td_s32 uapi_uart_read(ext_uart_idx id, td_u8 *data, td_u32 len);
td_s32 uapi_uart_write(ext_uart_idx id, TD_CONST td_u8 *data, td_u32 len);
ext_errno uapi_uart_deinit(ext_uart_idx id);
ext_errno uapi_uart_register_rx_callback(ext_uart_idx id,
td_u32 hook_mask,
td_u16 sufficient_cnt,
ext_uart_rx_hook hook);
td_bool uapi_uart_has_pending_transmissions(ext_uart_idx id);
ext_errno uapi_uart_flush_rx_data(ext_uart_idx id);
td_s32 uapi_uart_write_by_dma(ext_uart_idx id, TD_CONST td_u8 *data, td_u16 len, ext_uart_write_dma_config *dma_cfg);
ext_errno uapi_uart_set_flow_ctrl(ext_uart_idx id, ext_uart_flow_ctrl type);
ext_errno uapi_uart_set_software_flow_ctrl_level(ext_uart_idx id, td_u16 lower_water_margin, td_u16 upper_water_margin);
ext_errno uapi_uart_set_tx_timeout(ext_uart_idx id, td_u32 block_ms);
ext_errno uapi_uart_set_rx_timeout(ext_uart_idx id, td_u32 block_ms);
td_s32 uapi_uart_get_rx_data_count(ext_uart_idx id);
typedef td_u32 (*diag_cmd_f_prv)(td_u16 cmd_id, td_pvoid cmd_param, td_u16 cmd_param_size, td_u8 option);
typedef struct {
td_u16 min_id;
td_u16 max_id;
diag_cmd_f_prv fn_input_cmd;
} ext_diag_cmd_reg_obj;
td_u32 diag_register_cmd_prv(TD_CONST ext_diag_cmd_reg_obj *cmd_tbl, td_u16 cmd_num);
td_bool diag_is_connect_prv(td_void);
td_u32 diag_report_packet_prv(td_u16 cmd_id, td_u8 instance_id, TD_CONST td_pbyte packet,
td_u16 pakcet_size, td_bool sync);
td_u32 diag_init_prv(td_void);
typedef struct {
} diag_log_msg0;
typedef struct {
td_u32 data0;
} diag_log_msg1;
typedef struct {
td_u32 data0;
td_u32 data1;
} diag_log_msg2;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
} diag_log_msg3;
typedef struct {
td_u32 data0;
td_u32 data1;
td_u32 data2;
td_u32 data3;
} diag_log_msg4;
typedef enum {
APPLICATION_CORE = 0,
PROTOCOL_CORE,
SECURITY_CORE,
} core_type;
typedef struct {
td_u32 data0[5];
td_u32 data1;
} user_define_struct1;
typedef struct {
td_u32 data0;
td_u32 data1;
user_define_struct1 data2;
} user_define_struct0;
td_u32 diag_log_msg0_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod);
td_u32 diag_log_msg1_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, td_u32 d0);
td_u32 diag_log_msg2_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, td_u32 d0, td_u32 d1);
td_u32 diag_log_msg3_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, diag_log_msg3 log_msg);
td_u32 diag_log_msg4_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, diag_log_msg4 log_msg);
td_u32 diag_log_msg_buffer_prv(td_u32 msg_id, td_u32 src_mod, td_u32 dest_mod, td_pvoid buffer, td_u16 size);
td_void dms_regist_app_uart_rx_prv(td_pvoid fun1, td_pvoid fun2);
td_void dms_regist_app_uart_cb_prv(td_pvoid fun);
typedef unsigned char td_uchar;
typedef unsigned char td_u8;
typedef unsigned short td_u16;
typedef unsigned int td_u32;
typedef unsigned long long td_u64;
typedef unsigned long td_ulong;
typedef char td_char;
typedef signed char td_s8;
typedef short td_s16;
typedef int td_s32;
typedef long long td_s64;
typedef long td_slong;
typedef float td_float;
typedef double td_double;
typedef void td_void;
typedef td_u8 td_bool;
typedef td_u32 td_handle;
typedef td_u8 td_byte;
typedef td_byte* td_pbyte;
typedef void* td_pvoid;
typedef volatile td_u32 td_u32_reg;
typedef unsigned long td_size_t;
typedef signed long td_ssize_t;
typedef unsigned long td_length_t;
typedef unsigned long long td_mem_size_t;
typedef long long td_mem_handle_t;
typedef unsigned int td_fr32;
typedef unsigned int uintptr_t;
typedef uintptr_t td_uintptr_t;
typedef unsigned int td_phys_addr_t;
typedef unsigned int td_virt_addr_t;
typedef unsigned int td_phys_addr_bit32;
typedef struct {
td_u32 case_id;
td_u32 data[3];
}diag_dfx_cmd_req_st;
typedef struct {
td_u32 case_id;
td_u32 data[3];
}diag_dfx_cmd_ind_st;
typedef struct {
td_u32 put_msg_2_cache_fail_times;
td_u32 send_ipc_times;
td_u32 send_used_size;
td_u32 log_receive_times;
td_u32 log_reported_times;
td_u32 send_local_q_fail;
td_u32 record_idx;
td_u32 channel_receive_data_cnt[4];
td_u32 mem_pkt_alloc_size[2];
td_u32 mem_pkt_free_size[2];
} zdiag_dfx_stat;
typedef struct {
td_u32 dir;
td_u32 random_data;
} diag_beat_heart_cmd_ind;

181
build/config/target_config/ws63/hdb_config/database_template/acore/system/hdbcfg/mss_cmd_db.xml Executable file
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@ -0,0 +1,181 @@
<?xml version="1.0" encoding="utf-8"?>
<!--companytag Technologies Co.,Ltd.-->
<!--插件ID定义：DCL:0x100; ACL:0x101,CG:0x102,LV:0x110,SG:0x111,MV:0x112,DS:0x120,NVI:0x121,MS:0x122,LCM:0x123-->
<!--V1.0-->
<DebugKits>
<GROUP NAME="AUTO" DATA_STRUCT_FILE="..\diag\apps_core_hso_msg_struct_def.txt" MULTIMODE="Firefly" PLUGIN="0x111,0x110(1),0x252">
</GROUP>
<GROUP NAME="FIX" DATA_STRUCT_FILE="..\diag\fix_struct_def.txt" MULTIMODE="Firefly" AUTO_STRUCT="YES" PLUGIN="0x111,0x110(1),0x252">
<CMD ID="0x5071" NAME="get_mem_info" DESCRIPTION="get_mem_info" PLUGIN="0x100,0x102" TYPE="REQ_IND">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="ext_mdm_mem_info" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x71C0" NAME="diag_dfx" DESCRIPTION="diag_test_cmd" PLUGIN="0x100,0x252" TYPE="REQ_IND">
<REQ STRUCTURE="diag_dfx_cmd_req_st" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="diag_dfx_cmd_ind_st" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x71C1" NAME="ind_diag_dfx_stat" DESCRIPTION="diag_test_cmd" PLUGIN="0x100,0x252" TYPE="IND">
<IND STRUCTURE="zdiag_dfx_stat" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x5073" NAME="get_task_info" DESCRIPTION="get_task_info" PLUGIN="0x100,0x102" TYPE="REQ_IND">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="ext_task_info" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x5074" NAME="mem32" DESCRIPTION="mem32" PLUGIN="0x100,0x102,0x259" TYPE="REQ_IND">
<REQ STRUCTURE="mem_read_cmd_t" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="mem_read32_ind_t" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x5075" NAME="mem16" DESCRIPTION="mem16" PLUGIN="0x100,0x102,0x259" TYPE="REQ_IND">
<REQ STRUCTURE="mem_read_cmd_t" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="mem_read16_ind_t" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x5076" NAME="mem8" DESCRIPTION="mem8" PLUGIN="0x100,0x102,0x259" TYPE="REQ_IND">
<REQ STRUCTURE="mem_read_cmd_t" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="mem_read8_ind_t" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x5077" NAME="w1" DESCRIPTION="w1" PLUGIN="0x100,0x102,0x259" TYPE="REQ_IND">
<REQ STRUCTURE="mem_write_cmd_t" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="mem_write_ind_t" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x5078" NAME="w2" DESCRIPTION="w2" PLUGIN="0x100,0x102,0x259" TYPE="REQ_IND">
<REQ STRUCTURE="mem_write_cmd_t" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="mem_write_ind_t" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x5079" NAME="w4" DESCRIPTION="w4" PLUGIN="0x100,0x102,0x259" TYPE="REQ_IND">
<REQ STRUCTURE="mem_write_cmd_t" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="mem_write_ind_t" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x7180" NAME="uart_cfg" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ_IND">
<REQ STRUCTURE="uart_attr_t" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="tool_str_type" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x7181" NAME="get_uart_cfg" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ_IND">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="uart_attr_t" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x7182" NAME="mocked_shell_enable" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ_IND">
<REQ STRUCTURE="tool_u32" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="tool_str" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x7183" NAME="offline_log_cfg" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ_IND">
<REQ STRUCTURE="tool_u32" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="tool_str" TYPE="Auto" RESULT_CODE="" />
</CMD>
<CMD ID="0x7194" NAME="tranmit_reply" DESCRIPTION="" PLUGIN="0x259,0x261" TYPE="IND">
<IND STRUCTURE="transmit_data_reply_pkt" TYPE="Auto" />
</CMD>
<CMD ID="0x71D2" NAME="sample_data" DESCRIPTION="" PLUGIN="0x100,0x259" TYPE="REQ_IND">
<REQ STRUCTURE="diag_sample_data_cmd_t" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="diag_sample_data_ind_t" TYPE="Auto" />
</CMD>
<CMD ID="0x71D3" NAME="rftest" DESCRIPTION="" PLUGIN="0x100,0x102(2),0x259" TYPE="REQ">
<REQ STRUCTURE="transmit_state_notify_pkt" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="tool_null_stru" TYPE="Auto" />
</CMD>
<CMD ID="0x71A3" NAME="last_dump_start" DESCRIPTION="" PLUGIN="0x110,0x261" TYPE="IND">
<IND STRUCTURE="last_dump_start_ind_t" TYPE="Auto" />
</CMD>
<CMD ID="0x71A4" NAME="last_dump" DESCRIPTION="" PLUGIN="0x110,0x261" TYPE="IND">
<IND STRUCTURE="last_dump_data_ind_t" TYPE="Auto" />
</CMD>
<CMD ID="0x71A5" NAME="last_dump_finish" DESCRIPTION="" PLUGIN="0x110,0x261" TYPE="IND">
<IND STRUCTURE="last_dump_data_ind_finish_t" TYPE="Auto" />
</CMD>
<CMD ID="0x71A7" NAME="last_dump_end" DESCRIPTION="" PLUGIN="0x110,0x261" TYPE="IND">
<IND STRUCTURE="last_dump_start_ind_t" TYPE="Auto" />
</CMD>
<CMD ID="0x71A6" NAME="last_word" DESCRIPTION="" PLUGIN="0x100,0x110" TYPE="IND">
<IND STRUCTURE="diag_last_word_ind_t" TYPE="Auto" />
</CMD>
<CMD ID="0x71B1" NAME="upg_prepare" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="upg_prepare_info_t" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71B2" NAME="upg_request" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71D0" NAME="psd_enable" DESCRIPTION="" PLUGIN="0x100,0x102(2),0x259" TYPE="REQ">
<REQ STRUCTURE="psd_enable_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71D1" NAME="psd_report" DESCRIPTION="" PLUGIN="0x100,0x102(2),0x259" TYPE="IND">
<IND STRUCTURE="psd_report_stru" TYPE="Auto" />
</CMD>
<CMD ID="0x71B3" NAME="upg_start" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71E0" NAME="audio_proc_ai" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71E1" NAME="audio_proc_sea" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71E2" NAME="audio_proc_adec" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71E3" NAME="audio_proc_aenc" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71E4" NAME="audio_proc_ao" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71E5" NAME="audio_proc_ab" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x71E6" NAME="audio_proc_sys" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x5500" NAME="nv_read" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="nv_key_info_t" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x5501" NAME="sdm_nvw" DESCRIPTION="" PLUGIN="0x100,0x121" TYPE="REQ_IND">
<REQ STRUCTURE="nv_req_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x5503" NAME="sdm_nvr" DESCRIPTION="" PLUGIN="0x100,0x121" TYPE="REQ">
<REQ STRUCTURE="u32_type_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x5511" NAME="nv_write_with_attr" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="nv_key_write_with_attr_info_t" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x5510" NAME="nv_read_with_attr" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="nv_key_info_t" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0x5512" NAME="nv_get_store_status" DESCRIPTION="" PLUGIN="0x100,0x102" TYPE="REQ">
<REQ STRUCTURE="tool_null_stru" TYPE="Auto" PARAM_VALUE="" />
</CMD>
</GROUP>
<GROUP NAME="TOOL_FIX" DATA_STRUCT_FILE="..\diag\tool_fix_struct_def.txt" MULTIMODE="Firefly" PLUGIN="0x111,0x110(1),0x252">
<CMD ID="0x5314" TYPE="IND" NAME="msg_sys" PLUGIN="0x110(1)" DESCRIPTION="MSG上报（SYS）"></CMD>
<CMD ID="0x5315" TYPE="IND" NAME="msg_layer(dev)" PLUGIN="0x110(1)" DESCRIPTION="MSG上报（LAYER）"></CMD>
<CMD ID="0x5316" TYPE="IND" NAME="msg_usr" PLUGIN="0x110(1),0x110(5)" DESCRIPTION="MSG上报（USR）"></CMD>
<CMD ID="0x7191" NAME="get_file_list" DESCRIPTION="" PLUGIN="0x102(2),0x259" TYPE="REQ">
<REQ STRUCTURE="GetFileListReq" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="diag_cmd_sal_sys_sdm" TYPE="Auto" />
</CMD>
<CMD ID="0x7192" NAME="download_file" DESCRIPTION="" PLUGIN="0x102(2),0x259" TYPE="REQ">
<REQ STRUCTURE="FileContentReq" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="diag_cmd_sal_sys_sdm" TYPE="Auto" />
</CMD>
<CMD ID="0x7198" NAME="delete_file" DESCRIPTION="" PLUGIN="0x102(2),0x259" TYPE="REQ">
<REQ STRUCTURE="ext_diag_del_cmd" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="ext_diag_del_ind" TYPE="Auto" />
</CMD>
<CMD ID="0x7193" NAME="transmit_request" DESCRIPTION="" PLUGIN="0x102(2),0x259,0x261" TYPE="REQ">
<REQ STRUCTURE="transmit_data_request_item" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="tool_null_stru" TYPE="Auto" />
</CMD>
<CMD ID="0x7195" NAME="transmit_start" DESCRIPTION="" PLUGIN="0x102(2),0x259,0x261" TYPE="REQ">
<REQ STRUCTURE="transmit_start_pkt" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="tool_null_stru" TYPE="Auto" />
</CMD>
<CMD ID="0x7196" NAME="transmit_state" DESCRIPTION="" PLUGIN="0x102(2),0x259,0x261" TYPE="REQ">
<REQ STRUCTURE="transmit_state_notify_pkt" TYPE="Auto" PARAM_VALUE="" />
<IND STRUCTURE="tool_null_stru" TYPE="Auto" />
</CMD>
<CMD ID="0xA011" TYPE="IND" NAME="AT回显" PLUGIN="0x100,0x252,0x303" DESCRIPTION="">
<IND STRUCTURE="str_type" TYPE="Auto" PARAM_VALUE="" />
</CMD>
<CMD ID="0xA012" TYPE="IND" NAME="提示" PLUGIN="0x100,0x252,0x303" DESCRIPTION="">
<IND STRUCTURE="str_type" TYPE="Auto" PARAM_VALUE="" />
</CMD>
</GROUP>
</DebugKits>

10
build/config/target_config/ws63/hdb_config/database_template/acore/system/hdbcfg/mss_layout_db.xml Executable file
View File

@ -0,0 +1,10 @@
<?xml version="1.0" encoding="utf-8"?>
<!--Copyright 1998 - 2009, HiSilicon (Shanghai) Technologies Co., Ltd. ALL RIGHTS RESERVED-->
<!--HiStudiuo Layout DB Configuration.-->
<!--V1.0-->
<!--Change OBJ to LTE_VIEW,add new item to support VIEW-->
<!--V1.1-->
<HISTUDIO>
</HISTUDIO>

5
build/config/target_config/ws63/hdb_config/database_template/acore/system/hdbcfg/mss_nvi_db.xml Executable file
View File

@ -0,0 +1,5 @@
<?xml version='1.0' encoding='UTF-8'?>
<HISTUDIO>
<GROUP FEATURE="1&lt;&lt;0,1&lt;&lt;5" ID="0x1" NAME="Application" PARAM_DEF_FILE="../nv/nv_app_struct_def.txt" USEDMODE="0">
</GROUP>
</HISTUDIO>

190
build/config/target_config/ws63/hdb_config/database_template/acore/system/hdbcfg/mss_prim_db.xml Executable file
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@ -0,0 +1,190 @@
<?xml version="1.0" encoding="utf-8" ?>
<MSS>
<SUBSYSTEM NAME="wifi_core" DATA_STRUCT_FILE="..\diag\ws63_mcore_hso_msg_struct_def.txt" DESCRIPTION="" MULTIMODE="wifi_core">
<MSG_LOG>
<MSG STRUCTURE="tool_u8_array" NAME="test_u8_bin" ID="0x1" />
<MSG STRUCTURE="tool_u32_array" NAME="test_u32_bin" ID="0x2" />
<MSG STRUCTURE="tool_u8_array" NAME="RX_DSCR" ID="0x500" />
<MSG STRUCTURE="tool_u8_array" NAME="TX_DSCR" ID="0x501" />
<MSG STRUCTURE="tool_u8_array" NAME="RX_80211_FRAME" ID="0x502" />
<MSG STRUCTURE="tool_u8_array" NAME="TX_80211_FRAME" ID="0x503" />
<MSG STRUCTURE="tool_u8_array" NAME="RX_BEACON" ID="0x504" />
<MSG STRUCTURE="tool_u8_array" NAME="TX_BEACON" ID="0x505" />
<MSG STRUCTURE="tool_u8_array" NAME="RX_CB" ID="0x506" />
<MSG STRUCTURE="tool_u8_array" NAME="TX_CB" ID="0x507" />
<MSG STRUCTURE="tool_u8_array" NAME="RX_HMAC_CB" ID="0x508" />
<MSG STRUCTURE="tool_u8_array" NAME="RX_ETH_FRAME" ID="0x509" />
<MSG STRUCTURE="tool_u8_array" NAME="TX_ETH_FRAME" ID="0x50a" />
<MSG STRUCTURE="tool_u8_array" NAME="RX_CSI" ID="0x50b" />
<MSG STRUCTURE="tool_u8_array" NAME="PHY_BANK1_PILOT_INFO" ID="0x540" />
<MSG STRUCTURE="tool_u8_array" NAME="PHY_BANK2_PILOT_INFO" ID="0x541" />
<MSG STRUCTURE="tool_u8_array" NAME="PHY_BANK3_PILOT_INFO" ID="0x542" />
<MSG STRUCTURE="tool_u8_array" NAME="PHY_BANK4_PILOT_INFO" ID="0x543" />
<MSG STRUCTURE="tool_u8_array" NAME="PHY_BANK5_PILOT_INFO" ID="0x544" />
<MSG STRUCTURE="tool_u8_array" NAME="PHY_BANK6_PILOT_INFO" ID="0x545" />
<MSG STRUCTURE="tool_u8_array" NAME="PHY0_CTRL_PILOT_INFO" ID="0x546" />
<MSG STRUCTURE="tool_u8_array" NAME="PHY1_CTRL_PILOT_INFO" ID="0x547" />
<MSG STRUCTURE="tool_u8_array" NAME="MAC_CTRL0_BANK_PILOT_INFO" ID="0x54a" />
<MSG STRUCTURE="tool_u8_array" NAME="MAC_CTRL1_BANK_PILOT_INFO" ID="0x54b" />
<MSG STRUCTURE="tool_u8_array" NAME="MAC_CTRL2_BANK_PILOT_INFO" ID="0x54c" />
<MSG STRUCTURE="tool_u8_array" NAME="MAC_RD0_BANK_PILOT_INFO" ID="0x54d" />
<MSG STRUCTURE="tool_u8_array" NAME="MAC_RD1_BANK_PILOT_INFO" ID="0x54e" />
<MSG STRUCTURE="tool_u8_array" NAME="MAC_LUT0_BANK_PILOT_INFO" ID="0x54f" />
<MSG STRUCTURE="tool_u8_array" NAME="MAC_WLMAC_CTRL_PILOT_INFO" ID="0x550" />
<MSG STRUCTURE="tool_u8_array" NAME="ABB_CALI_WL_CTRL0_PILOT_INFO" ID="0x555" />
<MSG STRUCTURE="tool_u8_array" NAME="ABB_CALI_WL_CTRL1_PILOT_INFO" ID="0x556" />
<MSG STRUCTURE="tool_u8_array" NAME="RF0_REG_INFO" ID="0x55a" />
<MSG STRUCTURE="tool_u8_array" NAME="RF1_REG_INFO" ID="0x55b" />
<MSG STRUCTURE="tool_u8_array" NAME="SOC_RF_W_C0_CTL_PILOT_INFO" ID="0x560" />
<MSG STRUCTURE="tool_u8_array" NAME="SOC_RF_W_C1_CTL_PILOT_INFO" ID="0x561" />
<MSG STRUCTURE="tool_u8_array" NAME="SOC_W_CTL_PILOT_INFO" ID="0x562" />
<MSG STRUCTURE="tool_u8_array" NAME="SOC_COEX_CTL_PILOT_INFO" ID="0x563" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_MAC_RX" ID="0x570" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_MAC_TX" ID="0x571" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_MAC_APB" ID="0x572" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_MAC_RSSI" ID="0x573" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TX_AMPDU0" ID="0x574" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TX_AMPDU1" ID="0x575" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TX_AMPDU2" ID="0x576" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TX_AMPDU3" ID="0x577" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_RX_AMPDU0" ID="0x578" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_RX_AMPDU1" ID="0x579" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_RX_AMPDU2" ID="0x57a" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_RX_AMPDU3" ID="0x57b" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TX_ENCR_RC4" ID="0x57c" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_RX_DECR_RC4" ID="0x57d" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TX_ENCR_AES" ID="0x57e" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_RX_DECR_AES" ID="0x57f" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_MULTI_BSS" ID="0x580" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_HE_ROM" ID="0x581" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TRIGGER_NFRP" ID="0x582" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_COEX" ID="0x583" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_P2P" ID="0x584" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TX_BCN" ID="0x585" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TSF_VAP0" ID="0x586" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TSF_VAP1" ID="0x587" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_INTR_STATUS" ID="0x588" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_SOUNDING" ID="0x589" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_CSI" ID="0x58a" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_MU_EDCA" ID="0x58b" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_ERR_INTR_PADDING" ID="0x58c" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_ERR2_INTR_PADDING" ID="0x58d" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_DBAC" ID="0x58e" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TX_FSM" ID="0x58f" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_SOUDING_CSI" ID="0x590" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_TRIG_PADDING" ID="0x591" />
<MSG STRUCTURE="tool_u8_array" NAME="SAMPLE_RX_VECTOR" ID="0x592" />
<MSG ID="0x10203" NAME="80211_FRAME_TX" STRUCTURE="" />
<MSG ID="0x10213" NAME="80211_FRAME_RX" STRUCTURE="" />
<MSG ID="0x10303" NAME="BEACON_TX" STRUCTURE="" />
<MSG ID="0x10313" NAME="BEACON_RX" STRUCTURE="" />
<MSG ID="0x10403" NAME="ETH_FRAME_TX" STRUCTURE="" />
<MSG ID="0x10413" NAME="ETH_FRAME_RX" STRUCTURE="" />
<MSG ID="0x10503" NAME="OAM_OTA_TYPE_RX_DMAC_CB" STRUCTURE="" />
<MSG ID="0x10703" NAME="OAM_OTA_TYPE_TX_CB" STRUCTURE="" />
<MSG ID="0x11d03" NAME="OAM_OTA_DMAC_USER_INFO" STRUCTURE="" />
<MSG ID="0x13903" NAME="OAM_OTA_TYPE_RF0_REG_INFO" STRUCTURE="" />
<MSG ID="0x13A03" NAME="OAM_OTA_TYPE_RF1_REG_INFO" STRUCTURE="" />
<MSG ID="0x16103" NAME="OAM_OTA_TYPE_MAC_CTRL0_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16203" NAME="OAM_OTA_TYPE_MAC_CTRL1_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16303" NAME="OAM_OTA_TYPE_MAC_CTRL2_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16403" NAME="OAM_OTA_TYPE_MAC_RD0_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16503" NAME="OAM_OTA_TYPE_MAC_RD1_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16603" NAME="OAM_OTA_TYPE_MAC_LUT0_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16703" NAME="OAM_OTA_TYPE_MAC_WLMAC_CTRL_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x15903" NAME="OAM_OTA_TYPE_PHY_BANK1_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x15A03" NAME="OAM_OTA_TYPE_PHY_BANK2_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x15B03" NAME="OAM_OTA_TYPE_PHY_BANK3_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x15C03" NAME="OAM_OTA_TYPE_PHY_BANK4_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x15D03" NAME="OAM_OTA_TYPE_PHY_BANK5_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x15E03" NAME="OAM_OTA_TYPE_PHY_BANK6_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x15F03" NAME="OAM_OTA_TYPE_PHY0_CTRL_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16A03" NAME="OAM_OTA_TYPE_SOC_RF_W_C0_CTL_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16B03" NAME="OAM_OTA_TYPE_SOC_RF_W_C1_CTL_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x16E03" NAME="OAM_OTA_TYPE_RX_DSCR_PILOT" STRUCTURE="" />
<MSG ID="0x16F03" NAME="OAM_OTA_TYPE_TX_DSCR_PILOT" STRUCTURE="" />
<MSG ID="0x17003" NAME="OAM_OTA_TYPE_MAC_CTRL3_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x17103" NAME="OAM_OTA_TYPE_MAC_CTRL4_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x17203" NAME="OAM_OTA_TYPE_MAC_RD2_BANK_PILOT_INFO" STRUCTURE="" />
<MSG ID="0x17303" NAME="OAM_OTA_TYPE_PHY_BANK7_PILOT_INFO" STRUCTURE="" />
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="bt_core" DATA_STRUCT_FILE="..\diag\prot_core_hso_msg_struct_def.txt" DESCRIPTION="" MULTIMODE="bt_core">
<MSG_LOG>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="closed_comp" DATA_STRUCT_FILE="..\diag\prot_core_hso_msg_struct_def.txt" DESCRIPTION="" MULTIMODE="closed_comp">
<MSG_LOG>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="bt_status" DATA_STRUCT_FILE="..\diag\bt_status_hso_msg_struct_def.txt" DESCRIPTION="" MULTIMODE="bt_status">
<MSG_LOG>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="acore" DATA_STRUCT_FILE="..\diag\prot_core_hso_msg_struct_def.txt" DESCRIPTION="" MULTIMODE="acore">
<MSG_LOG>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="dsp_core" DATA_STRUCT_FILE="..\diag\prot_core_hso_msg_struct_def.txt" DESCRIPTION="" MULTIMODE="dsp_core">
<MSG_LOG>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="apps_core" DATA_STRUCT_FILE="..\diag\apps_core_hso_msg_struct_def.txt" DESCRIPTION="" MULTIMODE="apps_core">
<MSG_LOG>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="prot_core" DATA_STRUCT_FILE="..\diag\prot_core_hso_msg_struct_def.txt" DESCRIPTION="" MULTIMODE="prot_core">
<MSG_LOG>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="ota_msg" DATA_STRUCT_FILE="..\diag\fix_struct_def.txt" DESCRIPTION="" MULTIMODE="ota_msg">
<MSG_LOG>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
<SUBSYSTEM NAME="fix_msg" DATA_STRUCT_FILE="..\diag\fix_struct_def.txt" DESCRIPTION="" MULTIMODE="fix_msg">
<MSG_LOG>
<!-- OM_MSG_TYPE_LAST = 16-->
<MSG NAME="EXCEPTION_LAST_RUN_INFO" ID="0x100003"/>
</MSG_LOG>
<LAYER_LOG>
</LAYER_LOG>
<USERPLANE_LOG>
</USERPLANE_LOG>
</SUBSYSTEM>
</MSS>

61
build/config/target_config/ws63/hdb_config/database_template/acore/system/hdbcfg/mss_subsystem_db.xml Executable file
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@ -0,0 +1,61 @@
<?xml version="1.0" encoding="utf-8"?>
<!--CompanyName-->
<MSS>
<!--The definition of MSS basic ID, including Category ID, Module ID and name. Category / Module ID between subsystems must be unique-->
<SUBSYSTEM>
<CATEGORY>
<CAT NAME="System" ID="0x00000400" DESCRIPTION="System" />
<CAT NAME="Print" ID="0x00008000" DESCRIPTION="Print" />
<CAT NAME="Event" ID="0x00004000" DESCRIPTION="Event" />
<CAT NAME="Air" ID="0x00002000" DESCRIPTION="Air" />
<CAT NAME="Layer" ID="0x00001000" DESCRIPTION="Layer" />
<CAT NAME="User Plane" ID="0x00000200" DESCRIPTION="UserPlane" />
<CAT NAME="Message" ID="0x00000100" DESCRIPTION="Message" />
<CAT NAME="Custom messages" ID="0x00000010" DESCRIPTION="Custom messages" />
</CATEGORY>
<TITLE>
<ITEM ID="0x00" NAME="NO." STAT="1" VALUE="0" DESCRIPTION="..." />
<ITEM ID="0x01" NAME="Category" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x02" STAT="0" NAME="Level" DESCRIPTION="..." />
<ITEM ID="0x03" STAT="1" NAME="Date" DESCRIPTION="..." />
<ITEM ID="0x04" NAME="Time" STAT="1" DESCRIPTION="..." />
<ITEM ID="0x05" NAME="TimeStamp" STAT="1" DESCRIPTION="..." />
<ITEM ID="0x06" NAME="Chip" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x07" NAME="Cpu" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x08" NAME="Side" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x09" NAME="Layer" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x0A" NAME="Prim" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x0B" NAME="Source" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x0C" NAME="Destination" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x0D" NAME="FileName" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x0E" NAME="LineNo" STAT="0" DESCRIPTION="..." />
<ITEM ID="0x0F" NAME="Data" STAT="0" DESCRIPTION="..." />
</TITLE>
<LEVEL>
<PRINT ICON="\logging_item_type_icon.png">
<LEVEL NAME="Error" ID="0x40000000" ICON_OFFSET="0x1" DESCRIPTION="Error" />
<LEVEL NAME="Warning" ID="0x20000000" ICON_OFFSET="0x0" DESCRIPTION="Warning" />
<LEVEL NAME="Info" ID="0x10000000" ICON_OFFSET="0x2" DESCRIPTION="Info" />
<LEVEL NAME="Normal" ID="0x08000000" ICON_OFFSET="0x4" DESCRIPTION="Normal" />
</PRINT>
</LEVEL>
<MODULES RANGE="0x000,0xFFFF">
<MOD ID="0x00" NAME="WIFI" DESCRIPTION="WIFI" />
<MOD ID="0x01" NAME="BT" DESCRIPTION="BT" />
<MOD ID="0x02" NAME="GNSS" DESCRIPTION="GNSS" />
<MOD ID="0x03" NAME="DSP" DESCRIPTION="DSP" />
<MOD ID="0x04" NAME="PLATFORM" DESCRIPTION="PLATFORM" />
<MOD ID="0x05" NAME="MEDIA" DESCRIPTION="MEDIA" />
<MOD ID="0x06" NAME="NFC" DESCRIPTION="NFC" />
<MOD ID="0x07" NAME="APP" DESCRIPTION="APP" />
<MOD ID="0x08" NAME="GPU" DESCRIPTION="GPU" />
<MOD ID="0x09" NAME="GUI" DESCRIPTION="GUI" />
<MOD ID="0x0A" NAME="GLP" DESCRIPTION="GLP" />
<MOD ID="0x0B" NAME="BTH" DESCRIPTION="BTH" />
<MOD ID="0x0C" NAME="OHOS" DESCRIPTION="OHOS" />
<MOD ID="0x10" NAME="BT_STATUS" DESCRIPTION="BT_STATUS" />
<MOD ID="0x11" NAME="BT_OTA" DESCRIPTION="BT_OTA" />
<MOD ID="0x64" NAME="DIAG" DESCRIPTION="DIAG" />
</MODULES>
</SUBSYSTEM>
</MSS>

41
build/config/target_config/ws63/hdb_config/database_template/acore/system/hso/base_datatype_def.txt Executable file
View File

@ -0,0 +1,41 @@
UINT32 32 0
UINT16 16 0
UINT8 8 0
INT32 32 1
INT16 16 1
INT8 8 1
enum 32 0
HSO_ENUM 32 0
u32 32 0
u16 16 0
u8 8 0
s32 32 1
s16 16 1
s8 8 1
BOOL 8 0
TD_U8A 8 0
TD_U16A 16 0
TD_CHARTA 8 1 1
td_u32 32 0
td_u16 16 0
td_u8 8 0
td_s32 32 1
td_s16 16 1
td_s8 8 1
td_bool 8 0
td_char 8 1 1
char 8 1 1
long 32 1
td_pvoid 32 0
td_pbyte 32 0
uint8_t 8 0
uint16_t 16 0
uint32_t 32 0

41
build/config/target_config/ws63/hdb_config/database_template/acore/system/nv/base_datatype_def.txt Executable file
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@ -0,0 +1,41 @@
UINT32 32 0
UINT16 16 0
UINT8 8 0
INT32 32 1
INT16 16 1
INT8 8 1
enum 32 0
HSO_ENUM 32 0
u32 32 0
u16 16 0
u8 8 0
s32 32 1
s16 16 1
s8 8 1
BOOL 8 0
TD_U8A 8 0
TD_U16A 16 0
TD_CHARTA 8 1 1
td_u32 32 0
td_u16 16 0
td_u8 8 0
td_s32 32 1
td_s16 16 1
td_s8 8 1
td_bool 8 0
td_char 8 1 1
char 8 1 1
long 32 1
td_pvoid 32 0
td_pbyte 32 0
uint8_t 8 0
uint16_t 16 0
uint32_t 32 0

5
build/config/target_config/ws63/hdb_config/database_template/acore/system/nv/extern_datatype_def.txt Executable file
View File

@ -0,0 +1,5 @@
EXT_FTM_CHIP_TYPE_E 32 0
EXT_FTM_HW_PLATFORM_TYPE_E 32 0
EXT_FTM_PRODUCT_TYPE_E 32 0
ext_errno 32 0
sys_nv_enum 32 0

1
build/config/target_config/ws63/hdb_config/database_template/acore/system/nv/nv_app_struct_def.txt Executable file
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@ -0,0 +1 @@
#include "base_datatype_def.txt"