197 lines
6.7 KiB
C
197 lines
6.7 KiB
C
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/**
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* Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2023-2023. All rights reserved.
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*
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* Description: UART Sample Source. \n
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*
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* History: \n
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* 2023-06-29, Create file. \n
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*/
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#include "pinctrl.h"
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#include "uart.h"
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#include "watchdog.h"
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#include "soc_osal.h"
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#include "app_init.h"
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#if defined(CONFIG_UART_SUPPORT_DMA)
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#include "dma.h"
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#include "hal_dma.h"
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#endif
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#define UART_BAUDRATE 115200
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#define CONFIG_UART_INT_WAIT_MS 5
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#define UART_TASK_PRIO 24
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#define UART_TASK_STACK_SIZE 0x1000
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static uint8_t g_app_uart_rx_buff[CONFIG_UART_TRANSFER_SIZE] = { 0 };
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#if defined(CONFIG_UART_SUPPORT_INT_MODE)
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static uint8_t g_app_uart_int_rx_flag = 0;
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static volatile uint8_t g_app_uart_int_index = 0;
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static uint8_t g_app_uart_int_rx_buff[CONFIG_UART_TRANSFER_SIZE] = { 0 };
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#endif
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static uart_buffer_config_t g_app_uart_buffer_config = {
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.rx_buffer = g_app_uart_rx_buff,
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.rx_buffer_size = CONFIG_UART_TRANSFER_SIZE
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};
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#if defined(CONFIG_UART_SUPPORT_DMA)
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uart_write_dma_config_t g_app_dma_cfg = {
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.src_width = HAL_DMA_TRANSFER_WIDTH_8,
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.dest_width = HAL_DMA_TRANSFER_WIDTH_8,
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.burst_length = HAL_DMA_BURST_TRANSACTION_LENGTH_1,
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.priority = HAL_DMA_CH_PRIORITY_0
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};
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#endif
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static void app_uart_init_pin(void)
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{
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#if defined(CONFIG_PINCTRL_SUPPORT_IE)
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uapi_pin_set_ie(CONFIG_UART_RXD_PIN, PIN_IE_1);
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#endif /* CONFIG_PINCTRL_SUPPORT_IE */
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uapi_pin_set_mode(CONFIG_UART_TXD_PIN, CONFIG_UART_TXD_PIN_MODE);
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uapi_pin_set_mode(CONFIG_UART_RXD_PIN, CONFIG_UART_RXD_PIN_MODE);
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}
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static void app_uart_init_config(void)
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{
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uart_attr_t attr = {
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.baud_rate = UART_BAUDRATE,
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.data_bits = UART_DATA_BIT_8,
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.stop_bits = UART_STOP_BIT_1,
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.parity = UART_PARITY_NONE
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};
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uart_pin_config_t pin_config = {
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.tx_pin = CONFIG_UART_TXD_PIN,
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.rx_pin = CONFIG_UART_RXD_PIN,
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.cts_pin = PIN_NONE,
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.rts_pin = PIN_NONE
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};
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#if defined(CONFIG_UART_SUPPORT_DMA)
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uart_extra_attr_t extra_attr = {
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.tx_dma_enable = true,
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.tx_int_threshold = UART_FIFO_INT_TX_LEVEL_EQ_0_CHARACTER,
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.rx_dma_enable = true,
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.rx_int_threshold = UART_FIFO_INT_RX_LEVEL_1_CHARACTER
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};
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uapi_dma_init();
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uapi_dma_open();
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uapi_uart_deinit(CONFIG_UART_BUS_ID);
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uapi_uart_init(CONFIG_UART_BUS_ID, &pin_config, &attr, &extra_attr, &g_app_uart_buffer_config);
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#else
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uapi_uart_deinit(CONFIG_UART_BUS_ID);
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uapi_uart_init(CONFIG_UART_BUS_ID, &pin_config, &attr, NULL, &g_app_uart_buffer_config);
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#endif
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}
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#if defined(CONFIG_UART_SUPPORT_INT_MODE)
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static void app_uart_read_int_handler(const void *buffer, uint16_t length, bool error)
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{
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unused(error);
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if (buffer == NULL || length == 0) {
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osal_printk("uart%d int mode transfer illegal data!\r\n", CONFIG_UART_BUS_ID);
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return;
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}
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uint8_t *buff = (uint8_t *)buffer;
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if (memcpy_s(g_app_uart_rx_buff, length, buff, length) != EOK) {
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osal_printk("uart%d int mode data copy fail!\r\n", CONFIG_UART_BUS_ID);
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return;
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}
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if (memcpy_s(g_app_uart_int_rx_buff + g_app_uart_int_index, length, g_app_uart_rx_buff, length) != EOK) {
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g_app_uart_int_index = 0;
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osal_printk("uart%d int mode data2 copy fail!\r\n", CONFIG_UART_BUS_ID);
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}
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g_app_uart_int_index += length;
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g_app_uart_int_rx_flag = 1;
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}
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static void app_uart_write_int_handler(const void *buffer, uint32_t length, const void *params)
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{
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unused(params);
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uint8_t *buff = (void *)buffer;
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for (uint8_t i = 0; i < length; i++) {
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osal_printk("uart%d write data[%d] = %d\r\n", CONFIG_UART_BUS_ID, i, buff[i]);
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}
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}
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static void app_uart_register_rx_callback(void)
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{
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osal_printk("uart%d int mode register receive callback start!\r\n", CONFIG_UART_BUS_ID);
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if (uapi_uart_register_rx_callback(CONFIG_UART_BUS_ID, UART_RX_CONDITION_FULL_OR_SUFFICIENT_DATA_OR_IDLE,
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1, app_uart_read_int_handler) == ERRCODE_SUCC) {
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osal_printk("uart%d int mode register receive callback succ!\r\n", CONFIG_UART_BUS_ID);
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}
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}
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#endif
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static void *uart_task(const char *arg)
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{
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unused(arg);
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#if defined(CONFIG_UART_SUPPORT_DMA)
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int32_t ret = CONFIG_UART_TRANSFER_SIZE;
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#if defined(CONFIG_UART_USING_V151)
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ret = ERRCODE_SUCC;
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#endif
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#endif
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/* UART pinmux. */
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app_uart_init_pin();
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/* UART init config. */
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app_uart_init_config();
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#if defined(CONFIG_UART_SUPPORT_INT_MODE)
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app_uart_register_rx_callback();
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#endif
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while (1) {
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#if defined(CONFIG_UART_SUPPORT_INT_MODE)
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while (g_app_uart_int_rx_flag != 1) { osal_msleep(CONFIG_UART_INT_WAIT_MS); }
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g_app_uart_int_rx_flag = 0;
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osal_printk("uart%d int mode send back!\r\n", CONFIG_UART_BUS_ID);
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if (uapi_uart_write_int(CONFIG_UART_BUS_ID, g_app_uart_int_rx_buff, CONFIG_UART_TRANSFER_SIZE, 0,
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app_uart_write_int_handler) == ERRCODE_SUCC) {
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osal_printk("uart%d int mode send back succ!\r\n", CONFIG_UART_BUS_ID);
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}
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#elif defined(CONFIG_UART_SUPPORT_DMA)
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osal_printk("uart%d dma mode receive start!\r\n", CONFIG_UART_BUS_ID);
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if (uapi_uart_read_by_dma(CONFIG_UART_BUS_ID, g_app_uart_rx_buff, CONFIG_UART_TRANSFER_SIZE,
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&g_app_dma_cfg) == ret) {
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osal_printk("uart%d dma mode receive succ!\r\n", CONFIG_UART_BUS_ID);
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}
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osal_printk("uart%d dma mode send back!\r\n", CONFIG_UART_BUS_ID);
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if (uapi_uart_write_by_dma(CONFIG_UART_BUS_ID, g_app_uart_rx_buff, CONFIG_UART_TRANSFER_SIZE,
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&g_app_dma_cfg) == ret) {
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osal_printk("uart%d dma mode send back succ!\r\n", CONFIG_UART_BUS_ID);
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}
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#else
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osal_printk("uart%d poll mode receive start!\r\n", CONFIG_UART_BUS_ID);
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(void)uapi_watchdog_kick();
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if (uapi_uart_read(CONFIG_UART_BUS_ID, g_app_uart_rx_buff, CONFIG_UART_TRANSFER_SIZE,
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0) == CONFIG_UART_TRANSFER_SIZE) {
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osal_printk("uart%d poll mode receive succ!\r\n", CONFIG_UART_BUS_ID);
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}
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osal_printk("uart%d poll mode send back!\r\n", CONFIG_UART_BUS_ID);
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if (uapi_uart_write(CONFIG_UART_BUS_ID, g_app_uart_rx_buff, CONFIG_UART_TRANSFER_SIZE,
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0) == CONFIG_UART_TRANSFER_SIZE) {
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osal_printk("uart%d poll mode send back succ!\r\n", CONFIG_UART_BUS_ID);
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}
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#endif
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}
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return NULL;
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}
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static void uart_entry(void)
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{
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osal_task *task_handle = NULL;
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osal_kthread_lock();
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task_handle = osal_kthread_create((osal_kthread_handler)uart_task, 0, "UartTask", UART_TASK_STACK_SIZE);
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if (task_handle != NULL) {
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osal_kthread_set_priority(task_handle, UART_TASK_PRIO);
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}
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osal_kthread_unlock();
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}
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/* Run the uart_entry. */
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app_run(uart_entry);
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